Miodrag Potkonjak

Professor

Computer Science Department
UCLA 

467 Engineering VI
Los Angeles, CA 90095-1596
tel: (310) 825-0790, fax: (310) 794-5056

 

e-mail: miodrag@cs.ucla.edu

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Publications | Bio

Books

Book Chapters

Journal Papers

Magazine Articles

Conference Papers

Patents

Books

  1. G. Qu, M. Potkonjak, Intellectual Property Protection in VLSI Design Theory and Practice, Kluwer Publishing, ISBN 1-4020-7320-8, February 2003.

  2. J. Feng Sanford, S. Slijepcevic, M. Potkonjak, Localization in Wireless Networks: Foundations and Applications, Springer, ISBN-13: 978-1461418382, September 2012.

  3. Chip-Hong Chang, Miodrag Potkonjak, (Editors), Secure System Design and Trustable Computing, Springer International Publishing, 978-3-319-14970-7 (print ISBN) / 978-3-319-14971-4 (online ISBN), 2016.

  4. Shuvra S. Bhattacharyya, Miodrag Potkonjak, Senem Velipasalar, (Editors), Embedded, Cyber-Physical, and IoT Systems, Springer International Publishing, 978-3-030-16948-0 (print ISBN) / 978-3-030-16949-7 (online ISBN), 2020.

Book Chapters

  1. J. Rabaey, C. Chu, P. Hoang, M. Potkonjak, "Synthesis of Datapath Architectures", in "Anatomy of a Silicon Compiler", ed. by R.W. Brodersen, Kluwer Academic Publishers, Boston, MA, pp. 221-249, 1992.

  2. M. Potkonjak, J. Rabaey, "Exploring the Algorithmic Design Space Using High Level Synthesis", in "VLSI Design Methodologies for Digital Signal Processing Architectures", ed. by M.A. Bayoumi, Kluwer, Boston, MA, pp. 131-167, 1994.

  3. I. Hong, D. Kirovski, M. Potkonjak, "High Level Synthesis", in "Wiley Encyclopedia of Electrical and Electronic Engineering", John Wiley and Sons, 1999.

  4. S. Day, A. Parker, M. Potkonjak, Y. Tirat-Gefen, "Critical Path Analysis", in "Wiley Encyclopedia of Electrical and Electronic Engineering", John Wiles and Sons, 1999.

  5. S. Megerian, M. Potkonjak, "Wireless Sensor Networks", in "Encyclopedia of Telecommunications", Wiley Publishers, pp. 1-13, 2002. [PDF]

  6. J.L. Wong, J. Feng, D. Kirovski, M. Potkonjak, "Security and Privacy in Sensor Networks", in "Wireless Sensor Networks", Kluwer Academic Publishers, 2004. [PDF]

  7. F. Koushanfar, M. Potkonjak, A. Sangiovanni-Vincentelli, "Fault Tolerance in Wireless Sensor Networks", in "Handbook of Sensor Networks: Compact Wireless and Wired Sensing Systems", CRC press, Chapter 36, pp. 1-15, 2004. [PDF]

  8. S. Slijepcevic, J.L. Wong, M. Potkonjak, "Security and Privacy Protection in Wireless Sensor Networks", in "Handbook of Sensor Networks: Compact Wireless and Wired Sensing Systems", CRC press, Chapter 31, pp. 1-18, 2004. [PDF]

  9. J. Feng, F. Koushanfar, M. Potkonjak, "Sensor Network Architecture" in "Handbook of Sensor Networks", CRC press, pp. 1-26, 2004. [PDF]

  10. J. Feng, F. Koushanfar, M. Potkonjak, "Localized Algorithms for Sensor Networks" in "Handbook of Sensor Networks: Compact Wireless and Wired Sensing Systems", CRC press, Chapter 40, pp. 1-17, 2004. [PDF]

  11. J.L. Wong, J. Feng, D. Kirovski, M. Potkonjak, "Security in Sensor Networks: Watermarking Techniques", in "Wireless Sensor Networks", ed. by C. S. Raghavendra, K. M. Sivalingam and T. Znati, pp. 305-323, Kluwer Academic Publishing, 2004. [PDF]

  12. F. Koushanfar, M. Potkonjak, "Watermarking Techniques for Sensor Networks: Foundation and Applications" in "Security in Sensor Networks", ed. by Y. Xiao, Auerbach Publications, Taylor & Francis Group, 2006.

  13. M. Majzoobi, F. Koushanfar, M. Potkonjak, "FPGA-oriented Security" in "Introduction to Hardware Security and Trust", ed. by M. Tehranipour, M. Wang, Springer, 2011. [PDF]

  14. J. Wendt, S. Meguerdichian, M. Potkonjak, "Small is Beautiful and Smart" to appear in "Tele-Healthcare Computing and Engineering: Principles and Design", ed. by Fei Hu, SCIENCE PUBLISHERS, 2012. [PDF]

  15. S. Meguerdichian, J. Wendt, M. Potkonjak, "Trust and Privacy in Medical Systems using Public Physical Unclonable Functions" to appear in "Tele-Healthcare Computing and Engineering: Principles and Design", ed. by Fei Hu, SCIENCE PUBLISHERS, 2012. [PDF]

  16. H. Djidjev, M. Potkonjak, "Dynamic Coverage Problems in Sensor Networks" in "Intelligent Sensor Networks: The Integration of Sensor Networks, Signal Processing and Machine Learning", ed. by Fei Hu, Qi Hao, CRC Press, pp. 460-482, 2012. [PDF]

  17. N. A. Conos, S. Meguerdichian, M. Potkonjak, "Gate Sizing Under Uncertainty" in "VLSI-SoC: At the Crossroads of Emerging Trends", ed. by Alex Orailoglu, H. Fatih Ugurdag, Luís Miguel Silveira, Martin Margala, Ricardo Reis, Springer International Publishing, pp. 23-47, 2015. [PDF]

  18. T. Xu, M. Potkonjak, "Digital Bimodal Functions and Digital Physical Unclonable Functions: Architecture and Applications", In: "Secure System Design and Trustable Computing", ed. by Chip-Hong Chang, Miodrag Potkonjak, Springer International Publishing, pp. 83-113, 2016. [PDF]

  19. C-H. Chang, M. Potkonjak, L. Zhang, "Hardware IP Watermarking and Fingerprinting", In: "Secure System Design and Trustable Computing", ed. by Chip-Hong Chang, Miodrag Potkonjak, Springer International Publishing, pp. 329-368, 2016. [PDF]

Journal Papers

  1. Z. Obradovic, M. Potkonjak, M. Obradovic, "Design of Efficient Algorithms for VLSI Systolic Arrays", Informatics, Vol. 21, No. 2, pp. 153-159, 1987.

  2. J. Rabaey, C. Chu, P. Hoang, M. Potkonjak, "Fast Prototyping of Datapath-Intensive Architectures", IEEE Design and Test of Computers, Vol. 8, No. 2, pp. 40-51, June 1991. [PDF]

  3. M. Potkonjak, J. Rabaey, "Scheduling Algorithms for Hierarchical Data Control Flow Graphs", International Journal of Circuits Theory and Applications, Vol. 20, No. 3, pp. 217-234, May-June 1992.

  4. M. Potkonjak, J. Rabaey, "Optimizing Resource Utilization Using Transformations", IEEE Transactions on CAD, Vol. 13, No. 3, pp. 277-292, March 1994. [PDF]

  5. J. Rabaey, M. Potkonjak, "Estimating Implementation Bounds for Real Time Application Specific Circuits", IEEE Transaction on CAD, Vol. 13, No. 6, pp. 669-683, June 1994. [PDF]

  6. M. Potkonjak, J. Rabaey, "Optimizing Throughput and Resource Utilization using Pipelining: Transformation Based Approach", Journal of VLSI Signal Processing, Vol. 8, No. 2, pp. 117-130, October 1994.

  7. A.P. Chandrakasan, M. Potkonjak, R. Mehra, J. Rabaey, R. Brodersen, "Optimizing Power Using Transformations", IEEE Transactions on CAD, Vol. 14, No. 1, pp. 12-31, January 1995. [PDF]

  8. M. B. Srivastava, M. Potkonjak, "Optimum and Heuristic Transformation Techniques for Simultaneous Optimization of Latency and Throughput", IEEE Transaction on Very Large Scale Integration (VLSI) Systems, Vol. 3, No. 1, pp. 2-19, March 1995. [PDF]

  9. M. Potkonjak, S. Dey, R. K. Roy, "Considering Testability at Behavioral Level: Use of Transformations for Partial Scan Cost Minimization Under Timing and Area Constraints", IEEE Transactions on CAD, Vol. 14, No. 5, pp. 531-546, May 1995. [PDF]

  10. M. Potkonjak, P. Ashar, S. Dey, T. Misawa, R. K. Roy, "Synthesis Techniques for Low Power Digital Designs", NEC Research and Development Journal, Vol. 36, No 1, pp. 83-102, January 1995.

  11. M. Potkonjak, S. Dey, R.K. Roy, "Behavioral Synthesis of Area-Efficient Testable Designs Using Interaction Between Hardware Sharing and Partial Scan", IEEE Transactions on CAD, Vol. 14, No. 9, pp. 1141-1154, September 1995. [PDF]

  12. M. Potkonjak, M.B. Srivastava, A.P. Chandrakasan, "Multiple Constant Multiplications: Efficient and Versatile Framework and Algorithms for Exploring Common Subexpression Elimination", IEEE Transaction on CAD, Vol. 15, No. 2, pp. 151-165, February 1996. [PDF]

  13. M. R. Corazao, M. Khalaf, L. Guerra, M. Potkonjak, J. Rabaey, Performance Optimization using Template Mapping for Datapath-Intensive High-Level Synthesis", IEEE Transaction on CAD, Vol. 15, No. 8, pp. 877-888, August 1996. [PDF]

  14. S. Dey, M. Potkonjak, "Non-Scan Design -for-Testability Techniques using RT-Level Design", IEEE Transaction on CAD, Vol. 16, No. 12, pp. 1488-1506, December 1997. [PDF]

  15. L. M. Guerra, M. Potkonjak, J. Rabaey, "Behavioral-Level Synthesis of Heterogeneous BISR Reconfigurable ASICs", IEEE Transactions on VLSI Systems, Vol. 6, No. 1, pp. 158-167, January 1998. [PDF]

  16. S. Dey, V. Gangaram, M. Potkonjak, "A Controller Redesign Techniques To Enhance Testability of Controller-Data Path Circuits", IEEE Transaction on CAD, Vol. 17, No. 2, pp. 157-168, February 1998. [PDF]

  17. J. Lach, W. Mangione-Smith, M. Potkonjak, "Low Overhead Fault-tolerant FPGA Systems", IEEE Transactions on VLSI Systems, Vol. 6, No. 2, pp. 212-221, June 1998. [PDF]

  18. M. Potkonjak, M.B. Srivastava, "Behavioral Optimization Using the Manipulation of Timing Constraints", IEEE Transaction on CAD, Vol. 17, No. 10, pp. 936-947, October 1998. [PDF]

  19. C. Lee, M. Potkonjak, W.H. Wolf, "Synthesis of Hard Real-Time Application Specific Systems", Design Automation for Embedded Systems Journal, Vol. 4, No. 4, pp. 215-242, October 1998. [PDF]

  20. I. Hong, D. Kirovski, K. Kornegay, M. Potkonjak, "High-level Synthesis Techniques for Functional Test Pattern Execution", Integration, the VLSI journal, Vol. 25, No. 2, pp. 161-180, November 1998. [PDF]

  21. N. Shnidman, W. Mangione-Smith, M. Potkonjak, "On-line Fault Detection for Bus-based Field Programmable Gate Arrays", IEEE Transactions on VLSI Systems, Vol. 6, No. 4, pp. 656-666, December 1998. [PDF]

  22. M. Potkonjak, J. Rabaey, "Algorithm Selection: A Quantitative Optimization Intensive Approach", IEEE Transaction on CAD, Vol. 18, No. 5, pp. 524-533, May 1999. [PDF]

  23. S. Dao, E. Shek, A. Vellaikal, R. Muntz, L. Zhang, M. Potkonjak, O. Wolfson, "Semantic Multicast: Intelligently Sharing Collaborative Sessions", ACM Computing Surveys, Vol. 31, No. 2, pp. 27-33, June 1999.

  24. D. Kirovski, C. Lee, M. Potkonjak, W. Mangione-Smith, "Application-driven Synthesis of Memory-Intensive Systems-on-Chip", IEEE Transaction on CAD, Vol. 18, No. 9, pp. 1316-1326, September 1999. [PDF]

  25. I. Hong. M. Potkonjak, M.C. Papaefthymiou, "Efficient Block Scheduling to Minimize Context Switching Time for Programmable Embedded Processors", Design Automation for Embedded Systems Journal, Vol. 4, No. 4, pp. 311-327, October 1999. [PDF]

  26. I. Hong, M. Potkonjak, R. Karri, "Power Minimization using Divide-and-Conquer Techniques for Minimization of the Number of Operations", ACM Transaction on Design Automation, Vol. 4, No. 4, pp. 405-429, October 1999. [PDF]

  27. M. Potkonjak, W.Wolf, "A Methodology and Algorithms for the Design of Hard Real-Time Multitasking ASIC", ACM Transaction on Design Automation, Vol. 4, No. 4, pp. 430-459, October 1999. [PDF]

  28. M. Potkonjak, "Low Power and Quality of Service: From Algorithms and Architectures to RTOSs and Compilers", IEEE Concurrency, Vol. 7, No. 4, pp. 9-10, October 1999. [PDF]

  29. D. Kirovski, M. Potkonjak, L.M. Guerra, "Improving the observability and controllability of datapaths for emulation-based debugging", IEEE Transaction on CAD, Vol. 18, No. 12, pp. 1529-1541, November 1999. [PDF]

  30. I. Hong, D. Kirovski, G. Qu, M. Potkonjak, M.B. Srivastava, "Power Optimization of Variable Voltage Core-based Systems", IEEE Transaction on CAD, Vol.18, No.12, pp. 1702-1714, December 1999. [PDF]

  31. M. Potkonjak, J. Rabaey, "Maximally and Arbitrarily Fast Hardware Efficient Implementation of Linear and Feedback Linear Computations", IEEE Transaction on CAD, Vol. 19, No. 1, pp. 30-43, January 2000. [PDF]

  32. D. Kirovski, M. Potkonjak, L.M. Guerra, "Cut-based Debugging for Programmable Systems-on-Chip", IEEE Transactions on VLSI Systems, Vol. 8, No. 1, pp. 40-51, February 2000. [PDF]

  33. K.N. Lalgudi, M.C. Papaefthymiou, M. Potkonjak, "Optimizing Computations for Effective Block-Processing", ACM Transaction on Design Automation, Vol.5, No.3, pp. 604-630, July 2000. [PDF]

  34. J. Lach, W. Mangione-Smith, M. Potkonjak, "Enhanced FPGA Reliability Through Efficient Runtime Fault Recovery", IEEE Transactions on Reliability, Vol. 49, No. 49, pp. 296-304, September 2000. [PDF]

  35. R. Karri, K. Kim, M. Potkonjak, "Computer aided design of fault-tolerant application specific programmable processors", IEEE Transactions on Computers, Vol.49, No.11, pp. 1272-1284, November 2000. [PDF]

  36. C. Lee, J. Kin, M. Potkonjak, W. Mangione-Smith, "Exploring Hypermedia Processor Design Space", Journal of VLSI Signal Processing, Vol. 27, No.1-2, pp.171-186, February 2001. [PDF]

  37. F. Koushanfar, D. Kirovski, I. Hong, M. Potkonjak, M.C. Papaefthymiou, "Symbolic debugging of embedded hardware and software", IEEE Transactions on CAD, Vol. 20. No. 3, pp. 392-401, March 2001. [PDF]

  38. J. Kin, C. Lee, W. Mangione-Smith, M. Potkonjak, "Exploring the Diversity of Multimedia Systems", IEEE Transactions on VLSI Systems, Vol. 9, No.3, pp. 474-485, June 2001. [PDF]

  39. A. B. Kahng, S. Mantik, I. L. Markov, M. Potkonjak, P. Tucker, H. Wang, G. Wolfe, "Constraint-based watermarking techniques for design IP protection", IEEE Transactions on CAD, Vol. 20, No. 10, pp. 1236 -1252, October 2001. [PDF]

  40. J. Lach, W. H. Mangione-Smith, M. Potkonjak, "Fingerprinting Techniques for Field Programmable Gate Array Intellectual Property Protection", IEEE Transactions on CAD, Vol. 20, No. 10, pp. 1253 -1261, October 2001. [PDF]

  41. I Hong, M. Potkonjak, "Heterogeneous BISR using system level synthesis", IEEE Transactions on Reliability, 2001. [PS]

  42. G. Qu, M. Potkonjak, "System Synthesis of Synchronous Multimedia Applications", IEEE Transactions on Embedded Computing Systems, Special Issue on Memory Systems, Vol. 2, No. 1, pp. 74-97, Feburary 2002. [PDF]

  43. S. Megerian, F. Koushanfar, G. Qu, G. Veltri, M. Potkonjak, "Exposure In Wireless Sensor Networks: Theory And Practical Solutions", Journal of Wireless Networks, Vol. 8, No. 5, Kluwer Academic Publishers, pp. 443-454, September 2002. [PDF]

  44. S. Slijepcevic, S. Megerian, M. Potkonjak. "Location Errors in Wireless Embedded Sensor Networks: Sources, Models, and Effects on Applications", ACM Mobile Computing and Communications Review, Vol. 6, No. 3, pp. 67-78, July 2002. [PDF]

  45. G. Wolfe, J.L. Wong, M. Potkonjak, "Watermarking Graph Partitioning Solutions", IEEE Transactions on CAD, Vol. 21, No. 10, October 2002. [PDF]

  46. G. Qu, N. Kawabe, K. Usami, M. Potkonjak, "Code Coverage-based Power Estimation Techniques for Microprocessors", Journal of Circuits, Systems, and Computers, Vol. 11, No. 5, pp. 1-18, October 2002. [PDF]

  47. G. Qu, M. Potkonjak, "Techniques for Energy-Efficient Communication Pipeline Design", IEEE Transactions on VLSI, October 2002. [PDF]

  48. D. Kirovski, M. Potkonjak, "Local Watermarks: Methodology and Application to Behavioral Synthesis", IEEE Transactions on CAD, Vol. 22, No. 9, pp. 1277-1284, September 2003. [PDF]

  49. J.L. Wong, G. Qu, M. Potkonjak, "Optimization-Intensive Watermarking Techniques for Decision Problems", IEEE Transactions on CAD, Vol. 23, No. 1, pp. 119-127, January 2004. [PDF]

  50. J.L. Wong, M. Potkonjak, S. Dey, "Optimizing Designs Using the Addition of Deflection Operations", IEEE Transactions on CAD, Vol. 23, No. 1, pp. 50-59, January 2004. [PDF]

  51. A. E. Caldwell, H.J. Choi, A.B. Kahng, S. Mantik, M. Potkonjak, G. Qu, J.L. Wong, "Effective Iterative Techniques for Fingerprinting Design IP", IEEE Transactions on CAD, Vol. 23, No. 2, pp. 208-215, Febuary 2004. [PDF]

  52. I. Hong, M. Potkonjak, R. Karri, "A Heterogeneous Built-in Self-Repair Approach Using System-Level Synthesis Flexibility", IEEE Transactions on Reliability, Vol. 53 , No. 1, pp. 93-101, March 2004. [PDF]

  53. J.L. Wong, D. Kirovski, M. Potkonjak, "Computational forensic techniques for intellectual property protection", IEEE Transactions on CAD, Vol. 23, No. 6, pp. 987-994, June 2004. [PDF]

  54. J.L. Wong, F. Koushanfar, S. Meguerdichian , M. Potkonjak, "Probabilistic constructive optimization techniques", IEEE Transactions on CAD, Vol. 23, No. 6, pp. 859-868, June 2004. [PDF]

  55. J.L. Wong, G. Qu,  M. Potkonjak, "Power minimization in QoS sensitive systems", IEEE Transactions on VLSI, Vol. 12, No. 6, pp. 553-561, June 2004. [PDF]

  56. J.L. Wong, R. Majumdar, M. Potkonjak, "Fair watermarking using combinatorial isolation lemmas", IEEE Transactions on CAD, Vol. 23, No. 11, pp. 1566-1574, November 2004. [PDF]

  57. S. Megerian, F. Koushanfar, M. Potkonjak, M. B. Srivastava, "Worst and Best-Case Coverage in Sensor Networks", IEEE Transactions on  Mobile Computing, Vol. 4, No. 1, pp. 84-92, Jan-Feb 2005.

  58. D. Kirovski, M. Drinic, M. Potkonjak, "Engineering Change Protocols for Behavioral and System Synthesis", IEEE Transactions on CAD, Vol. 24, No. 8, pp. 1145-1155, 2005.

  59. F. Koushanfar, I. Hong, M. Potkonjak, "Behavioral Synthesis Techniques for Intellectual Property Protection", TODAES, Vol. 10, No. 3, pp. 523-545, 2005. [PDF]

  60. K. Kim, R. Karri, M. Potkonjak, "Micropreemption synthesis: an enabling mechanism for multitask VLSI systems", IEEE Transactions on CAD of Integrated Circuits and Systems, Vol. 25, No. 1, pp. 19-30, January 2006.

  61. J.L. Wong, A. Davoodi, V. Khandelwal, A. Srivastava, M. Potkonjak, "A statistical methodology for wire-length prediction", IEEE Transactions on CAD of Integrated Circuits and Systems, Vol. 25, No. 7, pp. 1327-1336, July 2006.

  62. J. Feng, G. Qu, and M. Potkonjak, "Kernel Density Estimation-Based Data Correlation", IEEE Sensors Journal, Vol. 6, No. 4, pp. 974-981, August 2006.

  63. M. Drinic, D. Kirovski, S. Megerian, M. Potkonjak, "Latency-Guided On-Chip Bus Network Design", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol 25, No. 12, pp. 2663-2673, December 2006.

  64. D. Kirovski, Y.-Y. Hwang, M. Potkonjak, and J. Cong, "Protecting Combinational Logic Synthesis Solutions", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 25, No. 12, pp. 2687-2696, December 2006.

  65. J. Feng, G. Qu, and M. Potkonjak, "Actuator-Based Infield Sensor Calibration", IEEE Sensors Journal, Vol. 6, No. 6, pp. 1571-1579, December 2006.

  66. F. Koushanfar, A. Davare, D. Nguyen, A. Sangiovanni-Vincentelli, M. Potkonjak, "Techniques for Maintaining Connectivity in Wireless Ad-hoc Networks Under Energy Constraints", ACM Transaction on Embedded Computing Systems, Vol. 6, No. 3, pp. 16-26, July 2007. [PDF]

  67. F. Dabiri, A. Nahapetian, T. Massey, M. Potkonjak, M. Sarrafzadeh, "General Methodology for Soft-Error-Aware Power Optimization Using Gate Sizing", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 27, No. 10, pp. 1788-1797, October 2008. [PDF]

  68. M. Majzoobi, F. Koushanfar, M. Potkonjak, "Techniques for Design and Implementation of Secure Reconfigurable PUFs", ACM Transactions on Reconfigurable Technology and Systems (TRETS), Vol. 2, No. 1, March 2009. [PDF]

  69. F. Koushanfar, M. Majzoobi, M.Potkonjak, "Nonparametric Combinatorial Regression for Shape Constrained Modeling", IEEE Transactions on Signal Processing, Vol. 58, No. 2, pp. 626-637, February 2010. [PDF]

  70. T. Massey, G. Marfia, M. Potkonjak, M. Sarrafzadeh, "Experimental Analysis of a Mobile Health System for Mood Disorders", IEEE Transactions on Information Technology in Biomedicine, Vol. 14, No. 2, pp. 241-247, March 2010. [PDF]

  71. M. Drinic, D. Kirovski, L. Yuan, G. Qu, M. Potkonjak, "Field Division Routing", EURASIP Journal on Wireless Communications and Networking, Article ID 560797, Vol. 2010, pp. 1-17, April 2010. [PDF]

  72. S. Wei, S. Meguerdichian, M. Potkonjak, "Malicious Circuitry Detection Using Thermal Conditioning", IEEE Transactions on Information Forensics and Security, Vol. 6, No. 3-2, pp. 1136-1145, September 2011. [PDF]

  73. M. Tehranipour, S. Devadas, K. Gotze, F. Koushanfar, M. Potkonjak, I. Verbauwhede, "Can we trust the chips of the future?", IEEE Design & Test of Computers, Vol. 28, No. 5, pp. 96-103, September-October 2011. [PDF]

  74. S. Wei, M. Potkonjak, "Scalable Hardware Trojan Diagnosis", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 20, No. 6, pp. 1049-1057, June 2012. [PDF]

  75. S. Wei, A. Nahapetian, M. Nelson, F. Koushanfar, M. Potkonjak, "Gate Characterization Using Singular Value Decomposition: Foundations and Applications", Vol. 7, No. 2, pp. 765-773 , IEEE Transactions on Information Forensics and Security, April 2012. [PDF]

  76. H. Noshadi, F. Dabiri, S. Meguerdichian, M. Potkonjak, M. Sarrafzadeh, "Behavior Oriented Data Resource Management in Medical Sensing Systems", ACM Transactions on Sensor Networks, Vol. 9, No. 2, pp. 12:1-12:26, March 2013. [PDF]

  77. V. Goudar, M. Potkonjak, "Fault-Tolerant and Low-Power Sampling Schedules for Localized BASNs", IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol. 3, No. 1, pp. 86-95, March 2013. [PDF]

  78. J. H. Ahnn, M. Potkonjak, "mHealthMon: Toward Energy-Efficient and Distributed Mobile Health Monitoring Using Parallel Offloading", Journal of Medical Systems, Vol. 37, No. 5, Article 9957, October 2013. [PDF]

  79. S. Wei, A. Nahapetian, M. Potkonjak, "Quantitative Intellectual Property Protection Using Physical-Level Characterization", IEEE Transactions on Information Forensics & Security (TIFS), Vol. 8 , No. 11, pp. 1722-1730, November 2013. [PDF]

  80. M. Rofouei, M. Potkonjak, M. Sarrafzadeh, "Energy Efficient Collaborative Sensing-based Design: Soft Keyboard Case Study", IEEE Transactions on Human-Machine Systems, Vol. 44, No. 1, pp. 115-124, February 2014. [PDF]

  81. J. H. Ahnn, M. Potkonjak, "VeSense: High-performance and energy-efficient vehicular sensing platform", Journal of Pervasive and Mobile Computing, Vol. 12, pp. 112-122, June 2014. [PDF]

  82. V. Goudar, Z. Ren, P. Brochu, M. Potkonjak, Q. Pei, "Optimizing the Output of a Human-Powered Energy Harvesting System with Miniaturization and Integrated Control", IEEE Sensors Journal, Vol. 14 , No. 7, pp. 2084-2091, July 2014. [PDF]

  83. M. Potkonjak, V. Goudar, "Public Physical Unclonable Functions", Proceedings of the IEEE, Vol. 102, No. 8, pp. 1142 - 1156, August 2014. [PDF]

  84. S. Wei, M. Potkonjak, "Self-Consistency and Consistency-Based Detection and Diagnosis of Malicious Circuitry", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 22, No. 9, pp. 1845-1853, September 2014. [PDF]

  85. A. Mirhoseini, M. Potkonjak, F. Koushanfar, "Phase Change Memory Write Cost Minimization by Data Encoding", IEEE Journal of Emerging and Selected Topics in Circuits and Systems, Vol. 5, No. 1, pp. 51-63, March 2015. [PDF]

  86. J. Rajendran, R. Karri, J. B. Wendt, M. Potkonjak, N. R. McDonald, G. S. Rose, B. T. Wysocki, "Nano Meets Security: Exploring Nanoelectronic Devices for Security Applications", Proceedings of the IEEE, Vol. 103, No. 5, pp. 829-849, May 2015. [PDF]

  87. T. Xu, M. Potkonjak, "Circuit power optimization using pipelining and dual-supply voltage assignment", Integration, the VLSI Journal, Vol. 65, pp. 241-251, March 2019. [PDF]

Magazine Articles

  1. M.Potkonjak, "Variability: For headache and profit", IEEE Design & Test of Computers, Vol. 27, No. 1, pp. 96-98, 2010. [PDF]

  2. F. Koushanfar, M.Potkonjak, "What is hardware security?", SIGDA Newsl. Vol. 40, No. 9, pp. 3-6, September 2010. [PDF]

Conference Papers

  1. N. Aleksic, M. Potkonjak, "Editor", Informatics Symposium, pp. 160-167, Jahorina, Yugoslavia, February 1986.

  2. N. Aleksic, M.Potkonjak, "Formatted input-output in PL/M-86", ETAN Conference, Vol. III, pp. 99-104, Herceg-Novi, Yugoslavia, June 1986.

  3. M. Potkonjak, N. Aleksic, "NP-Complete Problems in Communications", ETAN Conference, Vol. IV, pp. 445-450, Herceg-Novi, Yugoslavia, June 1986.

  4. Z. Obradovic, M. Potkonjak, "A New Heuristic Algorithm for Traveling Salesman and Related Problems", 8th International Symposium Computer at the University, pp. D.12 1-4, Cavtat, Yugoslavia, May 1986.

  5. N. Aleksic, M. Potkonjak, "A Speech Model Generator", 8th International Symposium Computer at the University, pp. 6R.10 1-6, Cavtat, Yugoslavia, May 1986.

  6. M. Potkonjak, N. Aleksic, "Supervision of the Maximum Possible Number of Radio-Emissions", 3rd International Conference on Systems Research Informatics & Cybernetics", pp. 8.4. 1-6, Baden-Baden, Germany, August 1986.

  7. M. Potkonjak, "Application of a Fast String Searching Algorithm in Signal Processing", 3rd International Conference on Systems Research Informatics & Cybernetics", pp. 3.1. 1-6, Baden-Baden, Germany, August 1986.

  8. N. Aleksic, M. Potkonjak, "A PCM Spectrum Model with additive Gaussian Noise", 9th International Symposium Computer at the University, pp. 9R.09 1-6, Cavtat, Yugoslavia, May 1987.

  9. M. Potkonjak, "New Variation at ICAI: Resolving Application Limitations and Possibilities of Artificial Intelligence in Computer-Aided Instruction", 9th International Symposium Computer at the University, pp. 9R.09 1-6, Cavtat, Yugoslavia, May 1987.

  10. Z. Obradovic, M. Potkonjak, "Software Speed-up of VLSI Systolics with Idle Cells", 9th International Symposium Computer at the University, pp. 2S.01 1-4, Cavtat, Yugoslavia, May 1987.

  11. M. Potkonjak, "Programming Languages and Data Organization", 9th International Symposium Computer at the University, pp. 1S.03 1-4, Cavtat, Yugoslavia, May 1987.

  12. M. Potkonjak, J.Rabaey, "A Scheduling and Resource Allocation Algorithm for Hierarchical Signal Flow Graphs", 26th ACM/IEEE Design Automation Conference, Las Vegas, NV, pp. 7-12, June 1989.

    [PDF]

  13. C. Chu, M. Potkonjak, M. Thaler, J. Rabaey, "HYPER: An Interactive Synthesis Environment for High Performance Real Time Applications", Proceedings IEEE ICCD, Cambridge, MA, pp. 432-435, October 1989. [PDF]

  14. J. Rabaey, M. Potkonjak, "Resource Driven Synthesis in the HYPER System", 1990 IEEE International Symposium on Circuits and Systems, New Orleans, LA, pp. 2592-2595, May 1990. [PDF]

  15. M. Potkonjak, J.Rabaey, "Retiming for Scheduling", VLSI Signal Processing Workshop, San Diego, CA, Vol. IV, pp. 23-32, IEEE Press, November 1990.

  16. J. Rabaey, M. Potkonjak, "Complexity Estimations for Real Rime Application Specific Circuits", 17th European Solid-State Circuits Conference, Milan, Italy, pp. 201-204, September 1991.

  17. M. Potkonjak, J. Rabaey, "Optimizing Resource Utilization Using Transformations", IEEE International Conference on Computer-Aided Design, Santa Clara, CA, pp. 88-91, November 1991. [PDF]

  18. M. Potkonjak, J. Rabaey, "Fast Implementation of Recursive Programs Using Transformations", International Conference on Acoustic, Speech, and Signal Processing, San Francisco, CA, pp. 569-572, March 1992. [PDF]

  19. M. Potkonjak, J. Rabaey, "Probabilistic Rejectionless Anti-Voter Optimization Algorithm", IEEE International Symposium on Circuits and Systems, San Diego, CA, pp. 1451-1454, May 1992. [PDF]

  20. M. Potkonjak, J. Rabaey, "Pipelining: Just Another Transformation", Application Specific Array Processors, Oakland, CA, pp. 163-175, August 1992. [PDF]

  21. D.C. Chen, L.M. Guerra, E.H. Ng, M. Potkonjak, D.P. Schultz, J. Rabaey, "An Integrated System for rapid Prototyping of High Performance Algorithm Specific Data Paths", Application Specific Array Processors, Oakland, CA, pp. 134-148, August 1992. [PDF]

  22. A.P. Chandrakasan, M. Potkonjak, J. Rabaey, R. Brodersen, "An Approach for Power Minimization Using Transformations", IEEE Workshop on VLSI Signal Processing, Napa Valley, CA, pp. 500-503, October 1992. [PDF]

  23. M. Potkonjak, J. Rabaey, "Maximally Fast and Arbitrarily Fast Implementation of Linear Computations", ICCAD-92 IEEE International Conference on Computer-Aided Design, Santa Clara, CA, pp. 304-308, November 1992. [PDF]

  24. S. Dey, M. Potkonjak, S. Rothweiler, "Performance Optimization of Sequential Circuits by Eliminating Retiming Bottlenecks", ICCAD-92 IEEE International Conference on Computer-Aided Design, Santa Clara, CA, pp. 504-509, November 1992. [PDF]

  25. A.P. Chandrakasan, M. Potkonjak, J. Rabaey, R. Brodersen, "Hyper-LP: A Design System for Power Minimization using Architectural Transformations", ICCAD-92 IEEE International Conference on Computer-Aided Design, Santa Clara, CA, pp. 300-303, November 1992. Distinguished Paper Citation. [PDF]

  26. M. Potkonjak, J. Rabaey, "On Unlimited Parallelism of DSP Arithmetic Computations", 1993 International Conference on Acoustic, Speech, and Signal Processing, Minneapolis, MN, pp. 381-384, April 1993. [PDF]

  27. S. Chakradhar, S. Dey, M. Potkonjak, S. Rothweiler, "Sequential Circuits Delay Optimization Using Global Path Delays", 30th ACM/IEEE DAC Design Automation Conference, Dallas, TX, pp. 483-489, June 1993. Best Paper Award Candidate. [PDF]

  28. Z. Iqbal, M. Potkonjak, S. Dey, A. Parker, "Critical Path Minimization Using Retiming and Algebraic Speed-Up", 30th ACM/IEEE DAC Design Automation Conference, Dallas, TX, pp. 573-577, June 1993. [PDF]

  29. L. Guerra, M. Potkonjak, J. Rabaey, "High Level Synthesis for Efficient Built-In Self Repair", 1993 International Workshop on Defect and Fault Tolerance in VLSI Systems, Venice, Italy, pp. 41-48, October 1993. [PDF]

  30. M. Potkonjak, L. Guerra, J. Rabaey, "Heterogeneous BISR Technique for Yield and Reliability Enhancement using High Level Synthesis Transformations", Proceedings of the International Conference on Application Specific Array Processors, Venice, Italy, pp. 454-465, October 1993. [PDF]

  31. M. Potkonjak, J. Rabaey, "Exploring The Algorithmic Design Space Using High Level Synthesis", VLSI Signal Processing Workshop, Eindhoven, Netherlands, pp.123-131,  October 1993. [PDF]

  32. M. Potkonjak, S. Dey, Z. Iqbal, A. Parker, "High Performance Embedded System Optimization Using Algebraic and Generalized Retiming Techniques", IEEE International Conference on Computer Design, Boston, MA, pp. 498-504, October 1993. [PDF]

  33. M.R. Corazao, M. Khalaf, L. Guerra, M. Potkonjak, J. Rabaey, "Instruction Set Mapping for Performance Optimization", ICCAD93 International Conference on Computer-Aided Design, Santa Clara, CA, pp. 518-521, November 1993. [PDF]

  34. L. Guerra, M. Potkonjak, J. Rabaey, "High Level Synthesis for Reconfigurable Datapath Structures"", ICCAD93 International Conference on Computer-Aided Design, Santa Clara, pp. 26-29, November 1993. Distinguished Paper Citation. [PDF]

  35. S. Dey, M. Potkonjak, R. Roy, "Exploiting Hardware-Sharing in High Level Synthesis for partial Scan Optimization", ICCAD93 International Conference on Computer-Aided Design, Santa Clara, pp. 20-25, November 1993. Distinguished Paper Citation. [PDF]

  36. M. B. Srivastava, M. Potkonjak, "Transforming Linear Systems for Joint Latency and Throughput Optimization", EDAC-94 European Design Automation Conference, Paris, France, pp. 267-271, 1994. [PDF]

  37. L.M. Guerra, M. Potkonjak, J. Rabaey, "Concurrency Characteristics in DSP Programs", ICASSP-94 International Conference on Acoustic, Speech, and Signal Processing, Minneapolis, MN, Vol. 2, pp. 433-436, April 1994. [PDF]

  38. S. Dey, M. Potkonjak, R.K. Roy, "Behavioral Synthesis of Low-Cost Partial Scan Designs for DSP Applications", ICASSP-94 International Conference on Acoustic, Speech, and Signal Processing, Minneapolis, MN, Vol. 2, pp. 441-444, April 1994. [PDF]

  39. M. Potkonjak, M. Srivastava, "Design of High Throughput, Low Latency and Low Cost Structures for Linear Systems", ICASSP-94 International Conference on Acoustic, Speech, and Signal Processing, Minneapolis, MN, Vol. 2, pp. 497-500, April 1994. [PDF]

  40. S. Dey, M. Potkonjak, R. K. Roy, "Synthesizing Designs with Low-Cardinality Minimum Feedback Vertex Set for Partial Scan Application", VLSI Test Symposium, Cherry Hill, pp. 2-7, April 1994. [PDF]

  41. M. Potkonjak, M.B. Srivastava, A.P. Chandrakasan, "Efficient Substitution of Multiple Constant Multiplications by Shifts and Additions using Iterative Pairwise Matching", DAC-94 31th ACM/IEEE DAC Design Automation Conference, San Diego, CA, pp. 189-194, June 1994. [PDF]

  42. M. Potkonjak, S. Dey, "Optimizing Resource Utilization and Testability using Hot Potato Techniques", DAC-94 31th ACM/IEEE DAC Design Automation Conference, San Diego, CA, pp. 201-205, June 1994. [PDF]

  43. M. Potkonjak, M. B. Srivastava, "Behavioral Synthesis of High Performance, Low Cost, and Low Power Application Specific Processors for Linear Computations", Proceedings of the International Conference on Application Specific Array Processors, pp. 45-56, San Francisco, CA, August 1994. [PDF]

  44. S. Dey, M. Potkonjak, "Transforming Behavioral Specifications to Facilitate Synthesis of Testable Designs", International Test Conference, Washington, DC, pp. 184-193, October 1994. [PDF]

  45. R.K. Roy, S. Dey, M. Potkonjak, "Test Synthesis Using High-Level Design Informations", International Test Symposium at International Test Conference, Washington, DC, pp. 311 - 316, 1994.

  46. S. Dey, M. Potkonjak, "Techniques for At-Speed Testing of VLSI ASIC Designs", VLSI Signal Processing Workshop, San Diego, CA, pp. 236-245, October 1994. [PDF]

  47. L. Guerra, M. Potkonjak, J. Rabaey, "System-Level Design Guidance Using Algorithm Properties", VLSI Signal Processing Workshop, San Diego, pp. 73-82, October 1994. [PDF]

  48. M. Potkonjak, J. Rabaey, "Area-time VLSI High Level Synthesis Laws: Theory and Practice", VLSI Signal Processing Workshop, San Diego, pp. 53-62, October 1994. [PDF]

  49. S. Dey, M. Potkonjak, "Non-Scan Design-for-Testability of RT-Level Data Paths", ICCAD94 International Conference on Computer-Aided Design, Santa Clara, CA, pp. 640-645, November 1994. [PDF]

  50. M. Potkonjak, J. Rabaey, "Algorithm Selection: A Quantitative Computation-Intensive Optimization Approach", ICCAD94 International Conference on Computer-Aided Design, Santa Clara, pp. 90-95, November 1994. [PDF]

  51. J.M. Rabaey, M. Potkonjak, K. Wakabayashi, "Efficient Throughput Optimization of Feedback Linear Computations using Horner Scheme", ICASSP95 International Conference on Acoustic, Speech, and Signal Processing, Detroit, MI, Vol. 4, pp. 2659-2662, 1995. [PDF]

  52. M. Potkonjak, J.M. Rabaey, "Power Minimization in DSP Application Specific Systems using Algorithm Selection", ICASSP95 International Conference on Acoustic, Speech, and Signal Processing, Detroit, MI, Vol. 4, pp. 2639-2642, 1995. [PDF]

  53. J.C. DeSouza-Batista, M.Potkonjak, A. Parker, "Optimal ILP-based Approach for Throughput Optimization using Algorithm/Architecture Matching and Retiming", DAC-95 32nd ACM/IEEE DAC Design Automation Conference, San Francisco, CA, pp. 113-118, 1995. [PDF]

  54. M. Potkonjak, M.B. Srivastava, "Rephasing: A Transformation Technique for the Manipulation of Timing Constraints", DAC-95 32nd ACM/IEEE DAC Design Automation Conference, San Francisco, CA, pp. 107-112, 1995. Best Paper Award Candidate. [PDF]

  55. M. Potkonjak, S. Dey, R.K. Roy, "Synthesis-for-Testability Using Transformations", ASP-DAC95 Asia-South Pacific Design Automation Conference, Chiba, Japan, pp. 485-490, September 1995, Best Paper Award Candidate. [PDF]

  56. M. B. Srivastavai, M. Potkonjak, "Energy Efficient Implementation of Linear System on Programmable Processors", 1995 IEEE Workshop on VLSI Signal Processing VIII, Osaka, Japan, pp. 147-156, October 1995. [PDF]

  57. M. Potkonjak, S. Dey, K.T. Kornegay, "Techniques for Implementation of At-Speed Testable, High Performance and Low Cost Linear Design", 1995 IEEE Workshop on VLSI Signal Processing VIII, Osaka, Japan, pp. 227-236, October 1995. [PDF]

  58. M. Potkonjak, A.P. Chandrakasan, "Synthesis and Selection of DCT Algorithms using Behavioral Synthesis-Based Algorithm Space Exploration", IEEE ICIP-95 International Conference on Image Processing, Washington, DC, pp. 65-68, October 1995. [PDF]

  59. M. Potkonjak, "Discrete-Relaxation-Based Heuristic Techniques for Video Algorithm/Architecture Matching and System Level Transformations", IEEE ICIP-95 Conference on Image Processing, Washington, DC, pp. 77-80, October 1995. [PDF]

  60. M. Potkonjak, S. Dey, K. Wakabayashi, "Design-for-Debugging of Application Specific Designs", ICCAD95 International Conference on Computer-Aided Design, San Jose, CA, pp. 295-301, November 1995. [PDF]

  61. M. Potkonjak, W. Wolf, "Cost Optimization in ASIC Implementation of Periodic Hard-Real Time Systems using Behavioral Synthesis Techniques", ICCAD95 International Conference on Computer-Aided Design, San Jose, CA, pp. 446-451, November 1995. [PDF]

  62. S. Dey, V. Gangaram, M. Potkonjak, "A Controller-Based Design-for-Testability Techniques for Controller-Data Path Circuits", ICCAD95 International Conference on Computer-Aided Design, San Jose, CA, pp. 534-540, November 1995. [PDF]

  63. M. B. Srivastava, M. Potkonjak, "Knowledge-Based Transformation Ordering", ICASSP96 International Conference on Acoustic, Speech, and Signal Processing, Atlanta, GA, Vol. 6, pp. 3335-3338, May 1996. [PDF]

  64. M. Potkonjak, W. Wolf, "Heuristic Techniques for Synthesis of Hard Real-Time DSP Application Specific Systems", ICASSP96 International Conference on Acoustic, Speech, and Signal Processing, Atlanta, GA, Vol. II, pp. 1240-1243, May 1996. [PDF]

  65. M. B. Srivastava, M. Potkonjak, "Power Optimization in Programmable Processors and ASIC Implementation of Linear Systems: Transformation-based Approach", DAC-96 33rd ACM/IEEE DAC Design Automation Conference, Las Vegas, NV, pp. 343-348, June 1996. [PDF]

  66. K.N. Lalgudi, M.C. Papaefthymiou, M. Potkonjak, "Optimizing Systems for Effective Block-Processing: The k-Delay Problem", DAC-96 33rd ACM/IEEE DAC Design Automation Conference, Las Vegas, NV, pp. 714-719, June 1996. [PDF]

  67. L. Guerra, M. Potkonjak, J. Rabaey, "Divide-and-Conquer Techniques for Global Throughput Optimization", VLSI Signal Processing Workshop, pp. 137-146, San Francisco, October 1996. [PDF]

  68. K. Kim. R. Karri, M. Potkonjak, "Maximizing the fault-tolerance of application specific programmable signal processors", VLSI Signal Processing Workshop, pp. 137-146, San Francisco, October 1996. [PDF]

  69. C. Lee, M. Potkonjak, W. Wolf, "System-level Synthesis of Application Specific Systems using A* Search and Generalized Force-Directed Heuristics", International Symposium on System Synthesis, pp. 2-7, San Diego, CA, November 1996. [PDF]

  70. S. Dozy, I. Hong, M. Potkonjak, "Throughput Optimization in Disk-Based Real-time Application Specific Systems", International Symposium on System Synthesis, pp, 133-138, San Diego, November 1996. [PDF]

  71. K. Kim. R. Karri, M. Potkonjak, "Heterogeneous Built-In-Resiliency of Application Specific Programmable Processors", ICCAD96 International Conference on Computer-Aided Design, pp. 406-411, San Jose, CA, November 1996. [PDF]

  72. I. Hong, M. Potkonjak, "Power Optimization in Disk-Based Real-Time Application Specific Systems", ICCAD96 International Conference on Computer-Aided Design, pp. 634-637, San Jose, CA, November 1996. [PDF]

  73. K. Kim. R. Karri, M. Potkonjak, "Configurable Spare Processors: A New Approach to System-Level Fault Tolerance", IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, pp. 295-303, Boston, MA, November 1996. [PDF]

  74. I. Hong, M. Potkonjak, "Minimizing the Number of Operations in DSP Computations", ICASSP97 International Conference on Acoustic, Speech, and Signal Processing, pp. 659-662, April 1997. [PDF]

  75. C. Lee, D. Kirovski, I. Hong, M. Potkonjak, "DSP Quant: Design, Validation, and Applications of DSP Hard Real-Time Benchmark", ICASSP97 International Conference on Acoustic, Speech, and Signal Processing, pp. 679-682, April 1997. [PDF]

  76. M. Potkonjak, K. Kim, R. Karri, "Methodology for Behavioral Synthesis-Based Algorithm-Level Design Space Exploration: DCT Case Study", DAC-97 34th ACM/IEEE DAC Design Automation Conference, Anaheim, CA, pp. 252-257, June 1997. [PDF]

  77. I. Hong, D. Kirovski, M. Potkonjak, "Potential-Driven Statistical Ordering of Transformations", DAC-97 34th ACM/IEEE DAC Design Automation Conference, Anaheim, CA, pp. 347-352, June 1997. [PDF]

  78. K. Kim, R. Karri, M. Potkonjak, "Synthesis of Application Specific Programmable Processors", DAC-97 34th ACM/IEEE DAC Design Automation Conference, Anaheim, CA, pp. 353-358, June 1997. [PDF]

  79. D. Kirovski, M. Potkonjak, "System-Level Synthesis of Low-Power Hard Real-Time Systems", DAC-97 34th ACM/IEEE DAC Design Automation Conference, Anaheim, CA, pp. 697-702, June 1997. [PDF]

  80. Y. Li, M. Potkonjak, W. Wolf, "Real-time operating systems for embedded computing", IEEE International Conference on Computer Design, pp. 388-392, Austin, TX, October 1997. [PDF]

  81. N. Shnidman, W. Mangione-Smith, M. Potkonjak, "Fault Scanner for Reconfigurable Logic", Advanced Research VLSI Conference, pp. 238-255, September 1997. [PDF]

  82. K. Kim, R. Karri, M. Potkonjak, "Micro-preemption Synthesis: An Enabling Mechanism for Multi-Task VLSI Systems", ICCAD97 International Conference on Computer-Aided Design, pp. 33-38, San Jose, CA, November 1997. [PDF]

  83. D. Kirovski, C. Lee. M. Potkonjak, W. Mangione-Smith, "Application-driven Synthesis of Core-based Systems", ICCAD97 International Conference on Computer-Aided Design, pp. 104-107, San Jose, CA, November 1997. [PDF]

  84. I. Hong, M. Potkonjak, R. Karri, "Power Optimization using Divide-and-Conquer Techniques for Minimization of the Number of Operations", ICCAD97 International Conference on Computer-Aided Design, pp. 108-111, San Jose, CA, November 1997. [PDF]

  85. D. Kirovski, M. Potkonjak, "A Quantitative Approach to Functional Debugging", ICCAD97 International Conference on Computer-Aided Design, pp. 170-175, San Jose, CA, November 1997. [PDF]

  86. C. Lee, W. Mangione-Smith, M. Potkonjak, "MediaBench: A Tool for Evaluating Multimedia and Communication Systems", MICRO-30 Conference, pp. 330-335, November 1997. [PDF]

  87. I. Hong, M. Potkonjak, "Techniques for Functional Test Pattern Execution", ASP-DAC98 Asia-South Pacific Design Automation Conference, Yokohama, Japan, pp. 283-288, February 1998. [PDF]

  88. I. Hong, M. Potkonjak, R. Karri, "Heterogeneous BISR-Approach Using System-Level Synthesis Flexibility", ASP-DAC98 Asia-South Pacific Design Automation Conference, Yokohama, Japan, pp. 289-294, February 1998. [PDF]

  89. D. Kirovski, C. Lee, M. Potkonjak, W. Mangione-Smith, "Synthesis of Power-Efficient Systems-on-Silicon", ASP-DAC98 Asia-South Pacific Design Automation Conference, Yokohama, Japan, pp. 557-562, February 1998. [PDF]

  90. C. Lee, M. Potkonjak, "Quantitative Selection of Media Benchmark", ASP-DAC98 Asia-South Pacific Design Automation Conference, Yokohama, Japan, pp. 105-110, February 1998. [PDF]

  91. J. Lach, W. Mangione-Smith, M. Potkonjak, "Efficiently Supporting Fault Tolerance in FPGAs", ACM/SIGDA International Symposium on Field Programmable Gate Arrays, pp. 105-115, February 1998. [PDF]

  92. J. Lach, W. Mangione-Smith, M. Potkonjak, "Fingerprinting Digital Circuits on Programmable Hardware", Information Hiding Workshop, pp. 16-31, Portland, Oregon, April 1998. [PDF]

  93. J. Lach, W. Mangione-Smith, M. Potkonjak, "FPGA Fingerprinting Techniques for Protecting Intellectual Property", 1998 Custom Integrated Circuits Conference, Santa Clara, CA, pp. 299-302, May 1998. [PDF]

  94. M. D. Ercegovac, D. Kirovski, G. Mustafa, M. Potkonjak, "Behavioral Synthesis Optimization using Multiple Precision Arithmetic", ICASSP98 International Conference on Acoustic, Speech, and Signal Processing, Seattle, WA, pp. 568-573, May 1998. [PDF]

  95. I. Hong, M. Potkonjak, "Technique for Intellectual Property Protection of DSP designs", ICASSP98 International Conference on Acoustic, Speech, and Signal Processing, pp. 3133-3136, Seattle. WA, May 1998. [PDF]

  96. I. Hong, D. Kirovski, G. Qu, M. Potkonjak, M.B. Srivastava, "Power Optimization of Variable Voltage Core-based Systems", DAC-98 35th ACM/IEEE DAC Design Automation Conference, pp. 176-181, San Francisco, CA, June 1998. [PDF]

  97. L. Guerra, M. Potkonjak, J. Rabaey, "A Methodology for Guided Behavioral-level Optimization", DAC-98 35th ACM/IEEE DAC Design Automation Conference, pp. 309-314, San Francisco, CA, June 1998. [PDF]

  98. C. Lee, J. Kin, M. Potkonjak, W. Mangione-Smith, "Media Architecture: General Purpose vs. Application Specific Programmable Processor", DAC-98 35th ACM/IEEE DAC Design Automation Conference, pp. 321-326, San Francisco, CA, June 1998. [PDF]

  99. D. Kirovski, M. Potkonjak, "Efficient Coloring of a Large Spectrum of Graphs", DAC-98 35th ACM/IEEE DAC Design Automation Conference, pp. 427-432, San Francisco, CA, June 1998. [PDF]

  100. A. B. Kahng, J. Lach, W. H. Mangione-Smith, S. Mantik, I.L. Markov, M. Potkonjak, P. Tucker, H. Wang, G. Wolfe, "Watermarking Techniques for Intellectual Property Protection", DAC-98 35th ACM/IEEE DAC Design Automation Conference, pp. 776-781, San Francisco, CA, June 1998. [PDF]

  101. A. B. Kahng, S. Mantik, I.L. Markov, M. Potkonjak, P. Tucker, H. Wang, G. Wolfe, "Robust IP Watermarking Methodologies for Physical Design", DAC-98 35th ACM/IEEE DAC Design Automation Conference, pp. 782-787, San Francisco, CA, June 1998. [PDF]

  102. H. Kim, W. Mangione-Smith, M. Potkonjak, "Protection Intellectual Ownership Rights of a Lossless Image Coder Through Hierarchical Watermarking", 1998 Signal Processing Systems Workshop, pp. 73-82, Boston, MA, October 1998. [PDF]

  103. J. Lach, W. Mangione-Smith, M. Potkonjak, "Signature Hiding Techniques for FPGA Intellectual Property Protection", ICCAD98 International Conference on Computer-Aided Design, pp. 186-189, San Jose, CA, November 1998. [PDF]

  104. G. Qu, M. Potkonjak, "Analysis of Watermarking Techniques for Graph Coloring Problem", ICCAD98 International Conference on Computer-Aided Design, pp. 190-193, San Jose, CA, November 1998. [PDF]

  105. D. Kirovski, Y-Y. Hwang, M. Potkonjak, J. Cong, "Intellectual Property Protection by Watermarking Combinational Logic Synthesis Solutions", ICCAD98 International Conference on Computer-Aided Design, pp. 194-198, San Jose, CA, November 1998. [PDF]

  106. C. Lee, M. Potkonjak, "A Quantitative Approach to development and Validation of Synthetic Benchmarks for Behavioral Synthesis", ICCAD98 International Conference on Computer-Aided Design, pp. 347-350, San Jose, CA, November 1998. [PDF]

  107. D. Kirovski, M. Potkonjak, L. Guerra, "Functional Debugging of Systems on Silicon", ICCAD98 International Conference on Computer-Aided Design, pp. 525-528, San Jose, CA, November 1998. [PDF]

  108. G. Qu, M. Potkonjak, "Techniques for Energy Minimization of Communication Pipelines", ICCAD98 International Conference on Computer-Aided Design, pp. 597-600, San Jose, CA, November 1998. [PDF]

  109. I. Hong, M. B. Srivastava, M. Potkonjak, "On-Line Scheduling of Hard Real-Time Tasks on Variable Voltage Processor", ICCAD98 International Conference on Computer-Aided Design, pp. 653-656, San Jose, CA, November 1998. [PDF]

  110. I. Hong, G. Qu, M. Potkonjak, M.B. Srivastava, "Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processor", 1998 Real-Time System Symposium, pp. 178-187, Madrid, Spain, December 1998. [PDF]

  111. J. Kin, C. Lee, W. Mangione-Smith, M. Potkonjak, "Hypermedia Processors: Design Space Exploration", 1998 Workshop on Multimedia Signal Processing, pp. 323-328, Los Angeles, CA, December 1998. [PDF]

  112. J. Lach, W. Mangione-Smith, M. Potkonjak, "Efficient Support of Hardware Debugging Through FPGA Physical Design Partitioning", ACM International Symposium on Field Programmable Gate Arrays, p. 247, Monterey, February 1999. [PDF]

  113. M. Potkonjak, D. Kirovski, "Engineering Change Protocols for Behavioral Synthesis", ICASSP99 International Conference on Acoustic, Speech, and Signal Processing, Vol. IV, pp. 1993-1996, Phoenix, AZ, March 1999. [PDF]

  114. D. Kirovski, M. Potkonjak, "Synthesis of DSP Soft Real-Time Multiprocessor Systems-on-Silicon", ICASSP99 International Conference on Acoustic, Speech, and Signal Processing, Vol. IV, pp. 1901-1904, Phoenix, AZ, March 1999. [PDF]

  115. K.T. Kornegay, G. Qu, M. Potkonjak, "Quality of Service and System Design", IEEE Workshop on VLSI `99, pp. 112-117, Orlando, FL, April 1999. [PDF]

  116. A. Rashid, J. Asher, W. Mangione-Smith, M. Potkonjak, "Hierarchical Watermarking for Protection of DSP Filter Cores", Custom Integrated Circuits Conference, San Diego, CA, May 1999. [PDF]

  117. G. Qu, D. Kirovski, M. Potkonjak, "Energy Minimization of Systems Pipelines Using Multiple Voltages", International Symposium on Circuits and Systems, Orlando, FL, Vol. 1, pp.362-365, June 1999. [PDF]

  118. G. Qu, J.L. Wong, M. Potkonjak, "Optimization-Intensive Watermarking Techniques for Decision Problems", DAC-99 36th ACM/IEEE DAC Design Automation Conference, pp.33-36, New Orleans, LA, June 1999. [PDF]

  119. J. Kin, C. Lee, W. Mangione-Smith, M. Potkonjak, "Power Efficient Media Processors: Design Space Exploration", DAC-99 36th ACM/IEEE DAC Design Automation Conference, pp. 321-326, New Orleans, LA, June 1999. [PDF]

  120. M. Ercegovac, D. Kirovski, M. Potkonjak, "Low Power Behavioral Synthesis Optimization Using Multiple Precision Arithmetic", DAC-99 36th ACM/IEEE DAC Design Automation Conference, pp. 568-573, New Orleans, LA, June 1999. [PDF]

  121. D. Kirovski, M. Potkonjak, "Engineering Change: Methodology and Applications to Behavioral and System Synthesis", DAC-99 36th ACM/IEEE DAC Design Automation Conference, pp. 604-609, New Orleans, LA, June 1999. [PDF]

  122. J. Lach, W. Mangione-Smith, M. Potkonjak, "Robust FPGA Intellectual Property Protection through Multiple Small Watermarks", DAC-99 36th ACM/IEEE DAC Design Automation Conference, pp. 831-836, New Orleans, LA, June 1999. [PDF]

  123. A. Caldwell, H-J, Choi, A.B. Kahng, S. Mantik, M. Potkonjak, G. Qu, J.L. Wong, "Effective Iterative Techniques for Fingerprinting Design IP", DAC-99 36th ACM/IEEE DAC Design Automation Conference, pp. 843-848, New Orleans, LA, June 1999. [PDF]

  124. I. Hong, M. Potkonjak, "Behavioral Synthesis Techniques for Intellectual Property Protection", DAC-99 36th ACM/IEEE DAC Design Automation Conference, pp.849-854, New Orleans, LA, June 1999. [PDF]

  125. C. Lee, J. Kin, W. Mangione-Smith, M. Potkonjak, "Designing Power Efficient Hypermedia Processors", International Symposium on Low Power Electronics and Design, pp. 276-278, San Diego, CA, August 1999. [PDF]

  126. J. Lach, W. Mangione-Smith, M. Potkonjak, "Algorithms for Efficient run-time fault recovery on diverse FPGA architectures", International Workshop on Defect and Fault Tolerance in VLSI Systems, pp. 386-394, Albuquerque, NM, October 1999. [PDF]

  127. J. Lach, W. Mangione-Smith, M. Potkonjak, "Enhanced Intellectual Property Protection for Digital Circuits on Programmable Hardware", Information Hiding Workshop, pp. 331-345, Dresden, Germany, September 1999. [PDF]

  128. G. Qu, M. Potkonjak, "Hiding Signatures in Graph Coloring Solutions", Information Hiding Workshop, pp. 391-408, Dresden, Germany, September 1999. [PDF]

  129. G. Qu, M. Potkonjak, "Power Minimization using System-level Partitioning of Applications with QoS"", ICCAD99 International Conference on Computer-Aided Design, pp. 343-346, San Jose, CA, November 1999. [PDF]

  130. I. Hong, M. Potkonjak, L.M. Guerra, "Throughput Optimization of general non-linear computations", ICCAD99 International Conference on Computer-Aided Design, pp. 406-409. San Jose, CA, November 1999. [PDF]

  131. D. Kirovski, M. Potkonjak, "Localized Watermarking: Methodology and Applications to Operation Scheduling", ICCAD99 International Conference on Computer-Aided Design, pp. 596-599, San Jose, CA, November 1999. [PDF]

  132. A. Kahng, D. Kirovski, S. Mantik. M. Potkonjak, J.L. Wong, "Copy Detection for Intellectual Property Protection of VLSI Designs", ICCAD99 International Conference on Computer-Aided Design, pp. 600-604, San Jose, CA, November 1999. [PDF]

  133. G. Qu, M. Mesarina, M. Potkonjak, "System Synthesis of Synchronous Multimedia Applications", International Symposium on System Synthesis, pp. 128-133, San Jose, CA, November 1999. [PDF]

  134. J. Lach, W. H. Mangione-Smith, M. Potkonjak, "Runtime Logic and Interconnect Fault Recovery on Diverse FPGA Architectures", Military and Aerospace Applications of Programmable Devices and Technologies International Conference, 1999.

  135. G. Qu, J.L. Wong, M. Potkonjak, "Fair Watermarking Techniques", Asia-South Pacific Design Automation Conference, pp. 55-60, Yokohama, Japan, January 2000. [PDF]

  136. J. Kin, C. Lee, W. Mangione-Smith, M. Potkonjak, "A Technique for QoS System partitioning", Asia-South Pacific Design Automation Conference, pp. 241-246, Yokohama, Japan, January 2000. [PDF]

  137. I. Hong, D. Kirovski, M. Potkonjak, M.C. Papaefthymiou, "Symbolic Debugging of Behavioral Specifications", ASP-DAC2000 Asia-South Pacific Design Automation Conference, pp. 397-400, Yokohama, Japan, January 2000. [PDF]

  138. D. Kirovski, M. Potkonjak, "Localized watermarking: methodology and application to template mapping", 2000 IEEE International Conference on Acoustics, Speech, and Signal Processing, Vol. 6, pp. 3235-3238, Istanbul, Turkey, 2000. [PDF]

  139. G. Qu, M. Potkonjak, "Energy Minimization with Guaranteed Quality of Service", International Symposium on Low Power Electronics and Design, pp. 43-48, Rapallo, Italy, July 2000. [PDF]

  140. G. Qu, M. Potkonjak, "Achieving Utility Arbitrarily Close to Optimal with Limited Energy", International Symposium on Low Power Electronics and Design, pp. 125-130, Rapallo, Italy, July 2000. [PDF]

  141. S. Meguerdichian, M. Potkonjak, "Watermarking while preserving the critical path", IEEE/ACM Design Automation Conference, pp. 108-111, Los Angeles, CA, June 2000. [PDF]

  142. J. Lach, W.H. Mangione-Smith, M. Potkonjak, "Efficient error detection, localization and correction for FPGA-based debugging", IEEE/ACM Design Automation Conference, pp. 207-212, Los Angeles, CA, June 2000. [PDF]

  143. D. Kirovski, D. Liu, J.L. Wong, M. Potkonjak, "Forensic engineering techniques for VLSI CAD tools", IEEE/ACM Design Automation Conference, pp. 580-586, Los Angeles, CA, June 2000. [PDF]

  144. G. Qu, M. Potkonjak, "Fingerprinting intellectual property using constraint-addition", IEEE/ACM Design Automation Conference, pp. 587-592, Los Angeles, CA, June 2000. [PDF]

  145. G. Qu, N. Kawabe, K. Usami, M. Potkonjak, "Function-level power estimation methodology for microprocessors", IEEE/ACM Design Automation Conference, pp. 810-813, Los Angeles, CA, June 2000. [PDF]

  146. F. Koushanfar, V. Prabhu, M. Potkonjak, J.M. Rabaey, "Processors for mobile applications", International Conference on Computer Design, pp. 603-608, Austin, TX, September 2000. [PDF]

  147. J. M. Burger, C. J. Cookson, D. Kirovski, D. P. Maher, M. Potkonjak, J. Welt, "Multimedia copyright enforcement on the Internet", ACM International Multimedia Conference, pp. 347-349, Los Angeles, CA, October 2000. [PDF]

  148. F. Koushanfar, D. Kirovski, M. Potkonjak, "Symbolic debugging scheme for optimized hardware and software", IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000, pp. 40-43, San Jose, CA, November 2000. [PDF]

  149. J.M. Rabaey, M. Potkonjak, F. Koushanfar, S. Li; T. Truong, "Challenges and opportunities in broadband and wireless communication designs", IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000, pp. 76-82, San Jose, CA, November 2000. [PDF]

  150. M. Drinic, D. Kirovski, S. Meguerdichian, M. Potkonjak, "Latency-guided on-chip bus network design", IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000, pp. 420-423, San Jose, CA, November 2000. [PDF]

  151. J.L. Wong, D. Kirovski, M. Potkonjak, "Computational Forensic Techniques for Intellectual Property Protection", Information Hiding Workshop, pp. 66-80, Pittsburgh, PA, April 2001. [PDF]

  152. F. Koushanfar, G. Qu, M. Potkonjak, "Intellectual Property Metering", Information Hiding Workshop, pp. 81-95, Pittsburgh, PA, April 2001. [PDF]

  153. S. Meguerdichian, F. Koushanfar, M. Potkonjak, M.B. Srivastava, "Coverage Problems in Wireless Ad-Hoc Sensor Networks", IEEE Infocom 2001,Vol 3, pp. 1380-1387, April 2001. [PDF]

  154. D. Kirovski, M. Drinic, M. Potkonjak, "Hypermedia-Aided Design", IEEE/ACM Design Automation Conference, pp. 407-412, Las Vegas, NV, June 2001. [PDF]

  155. G. Wolfe, J.L. Wong, M. Potkonjak, "Watermarking Graph Partitioning Solutions", IEEE/ACM Design Automation Conference, pp. 486-499, Las Vegas, NV, June 2001. [PDF]

  156. S. Meguerdichian, F. Koushanfar, A. Mogre, D. Petranovic, M. Potkonjak, "MetaCores: Design and Optimization Techniques", IEEE/ACM Design Automation Conference, pp. 585-590, Las Vegas, NV, June 2001. [PDF]

  157. S. Slijepcevic, M. Potkonjak, "Power efficient organization of wireless sensor networks", IEEE International Conference on Communications, vol. 2, pp 472-476, Helsinki, Finland, June 2001. [PDF]

  158. S. Meguerdichian, F. Koushanfar, G. Qu, M. Potkonjak, "Exposure In Wireless Ad Hoc Sensor Networks", International Conference on Mobile Computing and Networking (MobiCom '01), pp. 139-150, Rome, Italy, July 2001. Best Student Paper Award. [PDF]

  159. M. B. Srivastava, R. Muntz, M. Potkonjak, "Smart kindergarten: sensor-based wireless networks for smart developmental problem-solving environments", International Conference on Mobile Computing and Networking (MobiCom '01),pp. 132-138, Rome, Italy, July 2001. [PDF]

  160. S. Meguerdichian, S. Slijepcevic, V. Karayan, M. Potkonjak, "Localized Algorithms In Wireless Ad-Hoc Networks: Location Discovery and Sensor Exposure", MobiHOC 2001, pp. 106-116, Los Angeles, CA, October 2001. [PDF]

  161. J.L. Wong, F. Koushanfar, S. Meguerdichian, M. Potkonjak, "A Probabilistic Constructive Approach to Optimization Problems", ICCAD 2001, pp. 453-456, San Jose, CA, November 2001. [PDF]

  162. J.L. Wong, S. Meguerdichian, F. Koushanfar, A. Morge, D. Petranovic, M. Potkonjak, "Probabilistic Control Search Strategies For Hardware And Software Optimization During Solution Space Exploration", PACO 2001, pp. 1-18, Moscow, October 2001. [PDF]

  163. J.L. Wong, G. Qu, M. Potkonjak "Power Minimization under QoS Constraints", International Packet Video Conference, pp. 22-1 - 22-10, 2002. [PDF]

  164. J.L. Wong, M. Potkonjak, "Search in Sensor Networks: Challenges, Techniques, and Applications", International Conference on Acoustics Speech and Signal Processing, pp. 3752 -3755, 2002. [PDF]

  165. J.L. Wong, G. Veltri, M. Potkonjak, "Energy-efficient Data Multicast in Multi-Hop Wireless Networks", IEEE Workshop on Integrated Management of Power Aware Communications, Computing and Networking, pp. 69-85, 2002. [PDF]

  166. A. Srivastava, J. Sobaje, M. Potkonjak, M. Sarrafzadeh, "Optimal Node Scheduling of Effective Energy Usage in Sensor Networks", IEEE Workshop on Integrated Management of Power Aware Communications, Computing and Networking, pp. 53-68, 2002. [PDF]

  167. S. Meguerdichian, M. Drinic, M. Potkonjak, "Watermarking Integer Linear Programming Solutions", IEEE/ACM Design Automation Conference, pp. 8-13, June 2002. [PDF]

  168. F. Koushanfar, J.L. Wong, J. Feng, M. Potkonjak, "ILP-based Engineering Change", IEEE/ACM Design Automation Conference, pp. 910-915, June 2002. [PDF]

  169. J.L. Wong, S. Megerian, M. Potkonjak, "Forward-Looking Objective Functions: Concepts and Applications in High Level Synthesis", IEEE/ACM Design Automation Conference , pp. 904-909, June 2002. [PDF]

  170. F. Koushanfar, M. Potkonjak, A. Sangiovanni-Vincentelli, "Fault Tolerance in Wireless Ad-Hoc Sensor Networks", IEEE Sensors, Vol. 2, pp. 1491-1496, June 2002. [PDF]

  171. S. Slijepcevic, V. Tsiatsis, S. Zimbeck, M. B. Srivastava, M. Potkonjak, "On Communication Security in Wireless Ad-Hoc Sensor Networks", 11th IEEE International Workshops on Enabling Technologies: Infrastructure for Collaborative Enterprises, pp. 139-144, June 2002. [PDF]

  172. R. Kastner, C. Hsieh, M. Potkonjak, M. Sarrafzadeh, "On the sensitivity of incremental algorithms for combinatorial auctions", Advanced Issues of E-Commerce and Web-Based Information Systems, pp. 81 -88, June 2002. [PDF]

  173. J. Feng, F. Koushanfar, and M. Potkonjak, "System-Architectures for Sensor Networks Issues, Alternatives, and Directions", ICCD, special session on Sensor Networks, pp. 226-231, 2002. [PDF]

  174. J. Feng, M. Potkonjak, "Power Minimization by Separation of Control and Data Radios", IEEE CAS Workshop on Wireless Communication and Networking, pp. 115-119, 2002. [PDF]

  175. F. Koushanfar, S. Slijepcevic, M. Potkonjak, A. Sangiovanni-Vincentelli, "Error-Tolerant Multimodal Sensor Fusion", IEEE CAS Workshop on Wireless Communications and Networking, September 2002. [PDF]

  176. D. Kirovski, M. Drinic, M. Potkonjak, "Enabling Trusted Software Integrity", Architectural Support for Programming Languages and Operating Systems, pp. 108-120, 2002. [PDF]

  177. B. Shimanovsky, J. Feng, and M. Potkonjak, "Hiding Data in DNA", 5th Workshop on Information Hiding, pp. 373-386, 2002. [PDF]

  178. J.L. Wong, G. Qu, M. Potkonjak, "An On-line Approach for Power Minimization in QoS Sensitive Systems", Asia South Pacific Design Automation Conference,  pp. 59-64, 2003. [PDF]

  179. J. Feng, M. Potkonjak, "Real-time Watermarking Techniques for Sensor Networks", Security and Watermarking of Multimedia Contents, Santa Clara, California, pp. 391-402, 2003. [PDF]

  180. M. Drinic, D. Kirovski, M. Potkonjak, "PPM Model Cleaning", Data Compression Conference, pp. 163-172, 2003. [PDF]

  181. S. Slijepcevic, S. Megerian, M. Potkonjak, "Analysis of Location Error in Wireless Sensor Networks", 2nd International Workshop on Information Processing in Sensor Networks, pp. 593-608, April 2003. [PDF]

  182. V. Bychkovskiy, S. Megerian, D. Estrin, M. Potkonjak, "A Collaborative Approach to In-Place Sensor Calibration", 2nd International Workshop on Information Processing in Sensor Networks, pp. 301-316, 2003. [PDF]

  183. J.L. Wong, S. Megerian, M. Potkonjak, "Design Techniques for Sensor Appliances: Foundations and Light Compass Case Study", IEEE/ACM Design Automation Conference, pp. 66-71, 2003. [PDF]

  184. F. Koushanfar, M. Potkonjak, A. Sangiovanni-Vincentelli, "On-line Fault-Detection of Sensor Measurements", IEEE Sensor 2003, pp. 974-979, 2003. [PDF]

  185. J. Feng, S. Megerian, M. Potkonjak, "Model based Calibration for Sensor Networks", IEEE Sensor 2003, pp. 737- 742, 2003. [PDF]

  186. M. Drinic, D. Kirovski, M. Potkonjak, "Model Based Compression in Wireless Ad Hoc Networks", ACM SenSys 2003, pp. 231-242, 2003. [PDF]

  187. G. Veltri, Q. Huang, G. Qu, M. Potkonjak, "Minimal and Maximal Exposure Path Algorithms for Wireless Embedded Sensor Networks", ACM SenSys 2003, pp. 40-50, 2003. [PDF]

  188. Z. Zhang, Y. Fan, M. Potkonjak, J. Cong, "Gradual Relaxation Techniques for System Synthesis", International Conference on Computer Aided Design, pp. 529-535, 2003. [PDF]

  189. F. Koushanfar, A. Davare, D. Nguyen, M. Potkonjak, A. Sangiovanni-Vincentelli, "Low Power Coordination in Wireless Ad-hoc Networks", ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 475-480, August 2003. [PDF]

  190. J. Feng, G. Qu, M. Potkonjak, "Sensor Calibration Using Nonparametric Statistical Characterization Of Error Models", IEEE Sensors 2004, pp. 1456-1459, October 2004. [PDF]

  191. J. Feng, G. Qu, M. Potkonjak, "Differential On-Line Sensor Calibration", IEEE Sensors 2004, pp. 417-420, 2004. [PDF]

  192. F. Koushanfar, A. Sangiovanni-Vincentelli, M. Potkonjak, "Error Models For Light Sensors By Non-Parametric Statistical Analysis Of Raw Sensor Measurements", IEEE Sensors, pp. 1472-1475, 2004. [PDF]

  193. J.L. Wong, J.-Q. Ya, M. Potkonjak, "Watermarking Multiple Constant Multiplications Solutions", Asilomar Conference on Signals, Systems and Computers, pp. 67-71, 2004. [PDF]

  194. J.L. Wong, A. Davoodi, V. Khandelwal, A. Srivastava, M. Potkonjak, "Wire-length Prediction using Statistical and Probabilistic Techniques", International Conference on Computer Aided Design, pp. 702-705, 2004. [PDF]

  195. J.L. Wong, M. Potkonjak, "Relative Generic Computational Forensic Techniques", Information Hiding Workshop, pp. 148-163, May 2004. [PDF]

  196. J.L. Wong, R. Jafarri, M. Potkonjak, "Gateway Placement for Latency and Energy Efficient Data Aggregation", IEEE Workshop on Embedded Networked Sensors, pp. 490-497, 2004. [PDF]

  197. J.L. Wong, W. Liao, F. Li, L. He, M. Potkonjak, "Scheduling of Soft Real-Time Systems For Context-Aware Applications", DATE, pp. 318-323, 2005. [PDF]

  198. A. Cerpa, J.L. Wong, L. Kuang, M. Potkonjak, and D. Estrin, "Statisticals model of lossy links in wireless sensor networks", IEEE/ACM International Conference on Information Processing in Sensor Networks, pp. 81-88, 2005. [PDF]

  199. A. Cerpa, J.L. Wong, M. Potkonjak, and D. Estrin, "Temporal properties of low-power wireless links: Modeling and implications on multi-hop routing", ACM International Symposium on Mobile Ad Hoc Networking and Computing, pp. 414-425, 2005. [PDF]

  200. J.L. Wong, F. Koushanfar, and M. Potkonjak, "Flexible ASIC: shared masking for multiple media processors," Proceedings of the 42th ACM/IEEE Design Automation Conference, pp. 909-914, 2005. [PDF]

  201. J. Feng, M. Potkonjak, "Transitive statistical sensor error characterization and calibration", IEEE Sensors, pp. 572-575, 2005. [PDF]

  202. F. Koushanfar, M. Potkonjak, "Markov chain-based models for missing and faulty data in MICA2 sensor motes", IEEE Sensors, 576-579, 2005. [PDF]

  203. F. Koushanfar, N. Taft and M. Potkonjak, "Sleeping Coordination for Comprehensive Sensing Using Isotonic Regression and Domatic Partitions", IEEE Infocom, Barcelona, Spain, April 2006. [PDF]

  204. J. Feng, L. Girod, M. Potkonjak, "Location Discovery using Data-Driven Statistical Error Modeling", IEEE Infocom, Barcelona, Spain, April 2006. [PDF]

  205. J. Feng, L. Girod, M. Potkonjak, "Consistency-Based On-line Localization in Sensor Networks", International Conference on Distributed Computing in Sensor Systems (DCOSS) 529-545, 2006.

  206. J. Adriaens, S. Megerian, M. Potkonjak, "Optimal Worst-Case Coverage of Directional Field-of-View Sensor Networks", The third annual IEEE Communications Society Conference on Sensor, Mesh and Ad Hoc Communications and Networks (SECON 2006), pp. 336-345, September 2006. [PDF]

  207. J. Feng, M. Potkonjak, "Consistency Error Modeling-based Localization in Sensor Networks", IEEE Communications Society Conference on Sensor, Mesh and Ad Hoc Communications and Networks (SECON 2006), pp. 356-364, September 2006. [PDF]

  208. V. G. Moshnyaga, H. Vo, G. Reinman, M. Potkonjak, "Handheld System Energy Reduction by OS-Driven Refresh", International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS), pp. 24-35, September 2006. [PDF]

  209. F. Koushanfar, N. Kiyavash, M. Potkonjak, "Interacting Particle-based Model for Missing Data in Sensor Networks: Foundations and Applications", Proceedings of IEEE Sensors, pp. 888-891, October 2006. [PDF]

  210. J. Wong, S. Megerian, M. Potkonjak, "Staggered Sampling for Efficient Data Collection", Proceedings of IEEE Sensors, October 2006. [PDF]

  211. J.L. Wong, S. Megerian, M. Potkonjak, "Symmetric Monotonic Regression: Techniques and Applications for Sensor Networks", IEEE Sensors Applications Symposium, pp. 1-6, 2007. [PDF]

  212. J.L. Wong, S. Megerian, and M. Potkonjak, "Minimizing Global Interconnect in DSP Systems using Bypassing", IEEE International Conference on Acoustics, Speech, and Signal Processing, Vol. 2, pp. 77-80, 2007. [PDF]

  213. V. G. Moshnyaga, H. Vo, G. Reinman, M. Potkonjak, "Reducing Energy of DRAM/Flash Memory System by OS-controlled Data Refresh", International Symposium on Circuits and Systems (ISCAS 2007), pp. 2108-2111, 2007. [PDF]

  214. M. Potkonjak, J.L. Wong, "Introduction to Digital Design: A Paradigm-based Approach", IEEE International Conference on Microelectronic Systems Education, pp. 167-168, 2007. [PDF]

  215. F. Koushanfar, M. Potkonjak "Hardware Security: Preparing Students for the Next Design Frontier", Microelectronic Systems Education, pp. 67-68, 2007. [PDF]

  216. F. Koushanfar, M. Potkonjak, "Integration of Statistical Techniques in Design Curriculum", Microelectronic Systems Education, pp. 153-154, 2007. [PDF]

  217. S. Myers, S. Megerian, S. Banerjee, M. Potkonjak, "Experimental Investigation of IEEE 802.15.4 Transmission Power Control and Interference Minimization", Fourth Annual IEEE Communications Society Conference on Sensor, Mesh and Ad Hoc Communications and Networks SECON, pp. 294-303, June 2007. [PDF]

  218. F. Koushanfar, M. Potkonjak, "CAD-based Security, Cryptography, and Digital Rights Management", Design Automation Conference, pp. 268-269, San Diego, June 2007. [PDF]

  219. M. Drinic, D. Kirovski, G. Qu, L. Yuan, M. Potkonjak, "Field Division Routing", IST Mobile and Wireless Communications Summit, Budapest, Hungary, July 2007. [PDF]

  220. A. Nahapetian, F. Dabiri, M. Potkonjak, M. Sarrafzadeh, "Optimization for Real-Time Systems with Non-convex Power Versus Speed Models", PATMOS, pp. 443-452, 2007. [PDF]

  221. F. Dabiri, A. Nahapetian, M. Potkonjak, M. Sarrafzadeh, "Soft Error-Aware Power Optimization Using Gate Sizing", PATMOS, pp. 255-267, 2007. [PDF]

  222. Y. Alkabani, F. Koushanfar, M. Potkonjak, "Remote activation of ICs for piracy prevention and digital right management", ICCAD, pp. 674-677, 2007. [PDF]

  223. J.L. Wong, A. Davoodi, V. Khandelwal, A. Srivastava, M. Potkonjak, "Statistical timing analysis using Kernel smoothing", ICCD, pp. 97-102, 2007. [PDF]

  224. W. Jiang, Z. Zhang, M. Potkonjak, J. Cong, "Scheduling with integer time budgeting for low-power optimization", ASP-DAC, pp. 22-27, 2008. [PDF]

  225. M. Potkonjak, F. Koushanfar, "(Bio)-behavioral CAD", Design Automation Conference, pp. 351-352, 2008. [PDF]

  226. Y. Alkabani, T. Massey, F. Koushanfar, M. Potkonjak, "Input vector control for post-silicon leakage current minimization in the presence of manufacturing variability", DAC, pp. 606-609, 2008. [PDF]

  227. Y. Alkabani, F. Koushanfar, N. Kiyavash, M. Potkonjak, "Trusted Integrated Circuits: A Nondestructive Hidden Characteristics Extraction Approach", Information Hiding, pp. 102-117, 2008. [PDF]

  228. D. Shamsi, F. Koushanfar, M. Potkonjak, "Challenging benchmark for location discovery in ad hoc networks: foundations and applications", MobiHoc, pp. 361-370 , 2008. [PDF]

  229. M. Majzoobi, F. Koushanfar, M. Potkonjak, "Lightweight secure PUFs", ICCAD 2008, pp. 670-673, 2008. [PDF]

  230. M. Majzoobi, F. Koushanfar, M. Potkonjak, "Testing Techniques for Hardware Security", IEEE International Test Conference, pp. 1 - 10, 2008. [PDF]

  231. F. Dabiri, A. Vahdatpour, M. Potkonjak, M. Sarrafzadeh, "Energy minimization for real-time systems with non-convex and discrete operation modes", DATE, pp. 1416-1421, 2009. [PDF]

  232. F. Dabiri, M. Potkonjak, "Hardware aging-based software metering", DATE , pp. 460-465, 2009. [PDF]

  233. E. Sung, M. Potkonjak, "Energy Balancing Routing Schemes for Low-Power Wireless Networks", Communication Networks and Services Research Conference 2009, pp. 408-415, 2009. [PDF]

  234. E. Sung, M. Potkonjak, "Localized Probabilistic Routing for Data Gathering in Wireless Ad Hoc Networks", Communication Networks and Services Research Conference, pp. 356-363, 2009. [PDF]

  235. E. Sung, M. Potkonjak, "Energy-Aware Post Settings: A Study on Performance Gain by Adding Relaying Nodes in Wireless Ad-Hoc Networks", Wireless Communications and Networking Conference, pp. 2702-2707, 2009. [PDF]

  236. M. Nelson, A. Nahapetian, F. Koushanfar, M. Potkonjak, "SVD-Based Ghost Circuitry Detection", Information Hiding: 11th International Workshop 2009, Darmstadt, Germany, pp. 221-234, 2009. [PDF]

  237. N. Beckmann, M. Potkonjak, "Hardware-Based Public-Key Cryptography with Public Physically Unclonable Functions", Information Hiding: 11th International Workshop 2009, pp. 206-220, Darmstadt, Germany, 2009. [PDF]

  238. M. Potkonjak, A. Nahapetian, M. Nelson, T. Massey, "Hardware Trojan horse detection using gate-level characterization", Design Automation Conference, pp. 688 - 693, 2009. [PDF]

  239. Y. Alkabani, F. Koushanfar, M. Potkonjak, "N-version temperature-aware scheduling and binding", 14th ACM/IEEE International Symposium on Low Power Electronics and Design, pp. 331-334, August 2009. [PDF]

  240. S. Wei, S. Meguerdichian, M. Potkonjak, "Gate-level characterization: foundations and hardware security applications", ACM/IEEE Design Automation Conference (DAC), pp. 222-227, 2010. [PDF]

  241. M. Potkonjak, "Synthesis of trustable ICs using untrusted CAD tools", ACM/IEEE Design Automation Conference (DAC), pp. 633-634, 2010. [PDF]

  242. E. Sung, M. Potkonjak, "A framework for optimization of operational latency in wireless networks", IEEE Symposium on Computers and Communications (ISCC), pp. 235-240, 2010. [PDF]

  243. E. Sung, M. Potkonjak, "Optimized Operation for Infrastructure-Supported Wireless Sensor Networks", Sensor Mesh and Ad Hoc Communications and Networks (SECON), pp. 1-9, 2010. [PDF]

  244. A. Vahdatpour, M. Potkonjak, "Leakage Minimization Using Self Sensing and Thermal Management", International Symposium on Low Power Electronics and Design (ISLPED), pp. 265-270, 2010. [PDF]

  245. M. Potkonjak, S. Meguerdichian, J.L. Wong, "Trusted Sensors and Remote Sensing", IEEE Sensors, pp. 1104-1107, 2010. [PDF]

  246. A. Vahdatpour, M. Potkonjak, S. Meguerdichian, "A Gate-Level Sensor Network for Integrated Circuits Temperature Monitoring", IEEE Sensors, pp. 625-655, 2010. [PDF]

  247. S. Meguerdichian, H. Noshadi, F. Dabiri, M. Potkonjak, "Semantic Multimodal Compression for Wearable sensing Systems", IEEE Sensors, pp. 1149-1453, 2010. [PDF]

  248. S. Wei, M. Potkonjak, "Scalable Segmentation-Based Malicious Circuitry Detection and Diagnosis", International Conference on Computer Aided Design, pp. 483-486, 2010. [PDF]

  249. H. Noshadi, F. Dabiri, S. Meguerdichian, M. Potkonjak, M. Sarrafzadeh, "Energy Optimization in Wireless Medical Systems Using Physiological Behavior", ACM/BMES Wireless Health, pp. 128-136, 2010. [PDF]

  250. S. Meguerdichian M. Potkonjak, "Device Aging-Based Physically Unclonable Functions", ACM/IEEE Design Automation Conference, pp. 288-289, June 2011. [PDF]

  251. M. Potkonjak, S. Meguerdichian, A. Nahapetian, Sheng Wei, "Differential Public, Physically Unclonable Functions: Architecture and Applications", ACM/IEEE Design Automation Conference, pp. 242-247, June 2011. [PDF]

  252. S. Wei, M. Potkonjak, "Integrated Circuit Security Techniques Using Variable Supply Voltage", ACM/IEEE Design Automation Conference, pp. 248-253 June 2011. [PDF]

  253. J. H. Ahnn, M. Potkonjak, "What to Read? With Whom to Work? Where to Publish? - Scientific Techniques for Organizing and Conducting Engineering Research", IEEE International Conference on Microelectronic Systems Education, pp. 25-28, June 2011. [PDF]

  254. S. Meguerdichian, M. Potkonjak, "Matched Public PUF: Ultra Low Energy Security Platform", International Symposium on Low Power Electronics and Design, pp. 45-50, August 2011. [PDF]

  255. M. Rofouei, M. Sarrafzadeh, M. Potkonjak, "Efficient Collaborative Sensing-based Soft Keyboard", International Symposium on Low Power Electronics and Design, pp. 339-344, August 2011. [PDF]

  256. S. Wei, M. Potkonjak, "Scalable Consistency-based Hardware Trojan Detection and Diagnosis", The 5th International Conference on Network and System Security, pp. 176-183, September 2011. [PDF]

  257. S. Wei, F. Koushanfar, M. Potkonjak, "Integrated Circuit Digital Rights Management Techniques Using Physical Level Characterization", ACM Workshop on Digital Rights Management 2011, pp. 3-14, October 2011. [PDF]

  258. M. Rofouei, M. Sarrafzadeh, M. Potkonjak, "Detecting Local Events Using Global Sensing", IEEE Sensors, pp. 1165-1168, October 2011. [PDF]

  259. S. Meguerdichian, M. Potkonjak, "Security Primitives and Protocols for Ultra Low Power Sensor Systems", IEEE Sensors, pp. 1225-1228, October 2011. [PDF]

  260. J. B. Wendt, M. Potkonjak, "Medical Diagnostic-Based Sensor Selection", IEEE Sensors, pp. 1507-1510, October 2011. [PDF]

  261. J. B. Wendt, M. Potkonjak, "Nanotechnology-Based Trusted Remote Sensing", IEEE Sensors, pp. 1213-1216, October 2011. [PDF]

  262. S. Wei, A. Nahapetian, M. Potkonjak, "Robust Passive Hardware Metering", ICCAD, pp. 802-809, November 2011. [PDF]

  263. J. Zheng, M. Potkonjak, "Securing Netlist-Level FPGA Design through Exploiting Process Variation and Degradation", FPGA, pp. 129-139, February 2012. [PDF]

  264. Y-T. Chen, J. Cong, H. Huang, B. Liu, C. Liu, M. Potkonjak, G. Reinman, "Dynamically Reconfigurable Hybrid Cache: An Energy-Efficient Last-Level Cache Design", DATE, pp. 45-50, March 2012. [PDF]

  265. M. Rofouei, M. A. Ghodrat, M. Potkonjak, A. Martinez-Nova, "Optimization Intensive Energy Harvesting", DATE, pp. 272-275, March 2012. [PDF]

  266. J. B. Wendt, S. Meguerdichian, H. Noshadi, M. Potkonjak, "Energy and Cost Reduction in Localized Multisensory Systems through Application-Driven Compression", DCC, p. 411, April 2012. [PDF]

  267. S. Wei, M. Potkonjak, "Wireless security techniques for coordinated manufacturing and on-line hardware trojan detection", WISEC, pp. 161-172, April 2012. [PDF]

  268. A. Mirhoseini, M. Potkonjak, F. Koushanfar, "Coding-based energy minimization for phase change memory", ACM/IEEE Design Automation Conference, pp. 68-76, June 2012. [PDF]

  269. S. Wei, K. Li, F. Koushanfar, M. Potkonjak, "Hardware Trojan horse benchmark via optimal creation and placement of malicious circuitry", ACM/IEEE Design Automation Conference, pp. 90-95, June 2012. [PDF]

  270. F. Koushanfar, S. Fazzari, C. McCants, W. Bryson, M. Sale, P. Song, M. Potkonjak, "Can EDA combat the rise of electronic counterfeiting?", ACM/IEEE Design Automation Conference, pp, 133-138, June 2012. [PDF]

  271. J. B. Wendt, S. Meguerdichian, H. Noshadi, M. Potkonjak, "Semantics-driven sensor configuration for energy reduction in medical sensor networks", ISLPED, pp. 303-308, July 2012. [PDF]

  272. J. X. Zheng, E. Chen, M. Potkonjak, "A benign hardware Trojan on FPGA-based embedded systems", IEEE International Conference on Field Programmable Logic and Applications (FPL), pp. 464-470, Aug. 2012. [PDF]

  273. J. Rajendran, G. S. Rose, R. Karri, M. Potkonjak, "Nano-PPUF: A Memristor-Based Security Primitive", IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 84-87, 2012. [PDF]

  274. V. Goudar, M. Potkonjak, "Energy-efficient sampling schedules for body area networks", IEEE Sensors, pp. 1-4, October 2012. [PDF]

  275. V. Goudar, M. Potkonjak, "Dielectric Elastomer Generators for foot plantar pressure based energy scavenging", IEEE Sensors, pp. 1-4, October 2012. [PDF]

  276. J.B. Wendt, V. Goudar, H. Noshadi, M. Potkonjak, "Spatiotemporal assignment of energy harvesters on a self-sustaining medical shoe", IEEE Sensors, pp. 1-4, October 2012. [PDF]

  277. S. Meguerdichian, M. Potkonjak, "Low Energy Trusted Private Sensing Using Shared Hardware Random Number Generators", IEEE Sensors, pp. 1-4, October 2012. [PDF]

  278. S. Wei, L. Kai, F. Koushanfar, M. Potkonjak, "Provably complete hardware trojan detection using test point insertion", IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 569-576, 2012. [PDF]

  279. S. Meguerdichian, M. Potkonjak, "Using Standardized Quantization for Multi-Party PPUF Matching: Foundations and Applications", IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 577-584, November 2012. [PDF]

  280. G. S. Rose, J. Rajendran, N. McDonald, R. Karri, M. Potkonjak, B. Wysocki, "Hardware security strategies exploiting nanoelectronic circuits", Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 368-372, January 2013. [PDF]

  281. S. Wei, J. X. Zheng, M. Potkonjak, "Low power FPGA design using post-silicon device aging", ACM/SIGDA International Symposium on Field Programmable Gate Arrays, p. 277, February 2013. [PDF](Abstract only)

  282. S. Wei, J. H. Ahnn, M. Potkonjak, "Energy attacks and defense techniques for wireless systems", ACM Conference on Security and Privacy in Wireless and Mobile Networks (WiSec), pp. 185-194, April 2013. [PDF]

  283. S. Wei, M. Potkonjak, "The undetectable and unprovable hardware trojan horse", ACM/IEEE Design Automation Conference, Article No. 144, June 2013. [PDF]

  284. S. Wei, M. Potkonjak, "Malicious Circuitry Detection Using Fast Timing Characterization via Test Points", IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), pp.113-118, June 2013. [PDF]

  285. J. H. Ahnn, M. Potkonjak, "Modeling Mobile Cloud Computing Using Greenmetrics", International Workshop on Feedback Computing, pp. 1-6, June 2013. [PDF]

  286. J. H. Ahnn, M. Potkonjak, "VeSense: Energy-Efficient Vehicular Sensing", IEEE Vehicular Technology Conference, pp. 1-5, June 2013. [PDF]

  287. J. H. Ahnn, M. Potkonjak, "Toward Energy-Efficient and Distributed Mobile Health Monitoring Using Parallel Offloading", International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), pp. 7257-7261, July 2013. [PDF]

  288. S. Wei, J. X. Zheng, M. Potkonjak, "Aging-based Leakage Energy Reduction in FPGAs", International Conference on Field Programmable Logic and Applications (FPL), pp. 1-4, September 2013. [PDF]

  289. T. Xu, J. B. Wendt, M. Potkonjak, "Digital Bimodal Function: An Ultra-Low Energy Security Primitive", International Symposium on Low Power Electronics and Design (ISLPED), pp. 292-297, September 2013. [PDF]

  290. N. A. Conos, S. Meguerdichian, S. Wei, M. Potkonjak, "Maximizing Yield in Near-Threshold Computing under the Presence of Process Variation", International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 1-8, September 2013. [PDF]

  291. V. Goudar, Z. Ren, P. Brochu, Q. Pei, M. Potkonjak, "Optimizing the Configuration and Control of a Novel Human-Powered Energy Harvesting System", International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 75-82, September 2013. [PDF]

  292. V. Goudar, Z. Ren, P. Brochu, M. Potkonjak, Q. Pei, "Driving Low-Power Wearable Systems with an Adaptively-Controlled Foot-Strike Scavenging Platform", International Symposium on Wearable Computers, pp. 135-136, September 2013. [PDF]

  293. N. A. Conos, S. Meguerdichian, M. Potkonjak, "Gate Sizing in the Presence of Gate Switching Activity and Input Vector Control", IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), pp. 138-143,October 2013. [PDF]

  294. N. A. Conos, M. Potkonjak, "A Temperature-aware Synthesis Approach for Simultaneous Delay and Leakage Optimization", IEEE International Conference on Computer Design (ICCD), pp. 316-321, October 2013. [PDF]

  295. V. Goudar, M. Potkonjak, "A Semantically-Adaptive Strategy for Energy-Efficiency in Wireless Medical Monitoring Devices", IEEE Sensors, pp. 1-4, November 2013. [PDF]

  296. J. B. Wendt, M. Potkonjak, "Improving Energy Efficiency in Sensing Subsystems via Near-Threshold Computing and Device Aging", IEEE Sensors, pp. 1-4, November 2013. [PDF]

  297. T. Xu, M. Potkonjak, "Lightweight Digital Hardware Random Number Generators", IEEE Sensors, pp. 1-4, November 2013. [PDF]

  298. J. B. Wendt, M. Potkonjak, "The Bidirectional Polyomino Partitioned PPUF as a Hardware Security Primitive", IEEE Global Conference on Signal and Information Processing (GlobalSIP), pp. 257-260, December 2013. [PDF]

  299. M. Rostami, J. B. Wendt, M. Potkonjak, F. Koushanfar, "Quo vadis, PUF?: Trends and challenges of emerging physical-disorder based security", Design, Automation & Test in Europe Conference (DATE), pp. 1-6, March, 2014. [PDF]

  300. N. A. Conos, S. Meguerdichian, F. Dabiri, M. Potkonjak, "Provably minimal energy using coordinated DVS and power gating", Design, Automation & Test in Europe Conference (DATE), pp. 1-6, March, 2014. [PDF]

  301. V. Goudar, M. Potkonjak, "Low-power semantic fault-detection in multi-sensory mobile health monitoring systems", IEEE World Forum on Internet of Things (WF-IoT), pp. 32-36, March, 2014. [PDF]

  302. V. Goudar, J. B. Wendt, M. Potkonjak, Z. Ren, P. Brochu, Q. Pei, "Leveraging human gait characteristics towards self-sustained operation of low-power mobile devices", IEEE World Forum on Internet of Things (WF-IoT), pp. 468-473, March, 2014. [PDF]

  303. V. Goudar, M. Potkonjak, "A Robust Watermarking Technique for Secure Sharing of BASN Generated Medical Data", IEEE International Conference on Distributed Computing in Sensor Systems (DCOSS), pp. 162-170, May, 2014. [PDF]

  304. J. B. Wendt, F. Koushanfar, M. Potkonjak, "Techniques for Foundry Identification", ACM/IEEE Design Automation Conference (DAC), pp. 1-6, June, 2014. [PDF]

  305. S. Wei, J. B. Wendt, A. Nahapetian, M. Potkonjak, "Reverse Engineering and Prevention Techniques for Physical Unclonable Functions Using Side Channels", ACM/IEEE Design Automation Conference (DAC), pp. 1-6, June, 2014. [PDF]

  306. N. A. Conos, S. Meguerdichian, M. Potkonjak, "Coordinated and adaptive power gating and dynamic voltage scaling for energy minimization", IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), pp. 100-107, 2014. [PDF]

  307. T. Xu, M. Potkonjak, "Robust and Flexible FPGA-based Digital PUF", International Conference on Field Programmable Logic and Applications (FPL), pp. 1-6, September, 2014. [PDF]

  308. J. Zheng, M. Potkonjak, D. Li, "A Secure and Unclonable Embedded System using Instruction-level PUF Authentication", International Conference on Field Programmable Logic and Applications (FPL), pp. 1-4, September, 2014. [PDF]

  309. V. Goudar, M. Potkonjak, "Addressing biosignal data sharing security issues with robust watermarking", International Conference on Sensing, Communication, and Networking (SECON), pp. 1-6, September, 2014. [PDF]

  310. T. Xu, J. B. Wendt, M. Potkonjak, "Matched Digital PUFs for Low Power Security in Implantable Medical Devices", IEEE International Conference on Healthcare Informatics (ICHI), pp. 33-38, September, 2014. [PDF]

  311. R. Yan, V. C. Shah, T. Xu, M. Potkonjak, "Security Defenses for vulnerable Medical Sensor Network", IEEE International Conference on Healthcare Informatics (ICHI), pp. 300-309, September, 2014. [PDF]

  312. V. Goudar, M. Potkonjak, "On Admitting Sensor Fault Tolerance While Achieving Secure Biosignal Data Sharing", IEEE International Conference on Healthcare Informatics (ICHI), pp. 266-275, September, 2014. [PDF]

  313. J. Zheng, M. Potkonjak, "A Digital PUF-based IP Protection Architecture for Network Embedded Systems", Symposium on Architecture for Networking and Communications Systems (ANCS), pp. 255-256, October, 2014. [PDF]

  314. J. B. Wendt, T. Xu, M. Potkonjak, "Secure Remote Sensing and Communication using Digital PUFs", Symposium on Architecture for Networking and Communications Systems (ANCS), pp.173-184, October, 2014. [PDF]

  315. T. Xu, M. Potkonjak, "A Lightweight Security Primitive Using Laser-Based Fault Injection", IEEE Sensors, pp. 1248-1251, November, 2014. [PDF]

  316. R. Yan, T. Xu, M. Potkonjak, "Semantic Attacks on Wireless Medical Devices", IEEE Sensors, pp. 482-485, November, 2014. [PDF]

  317. T. Xu, J. B. Wendt, M. Potkonjak, "Ultra-Lightweight Symmetric-Key Cipher for Resource Constrained Systems", IEEE Sensors, pp. 1252-1255, November, 2014. [PDF]

  318. J. B. Wendt, M. Potkonjak, "Hardware obfuscation using PUF-based logic", IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 270-277, November, 2014. [PDF]

  319. T. Xu, J. B. Wendt, M. Potkonjak, "Security of IoT systems: design challenges and opportunities", IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 417-423, November, 2014. [PDF]

  320. T. Xu, M. Potkonjak, "Digital PUF using intentional faults", International Symposium on Quality Electronic Design (ISQED), pp. 448-451, March, 2015. [PDF]

  321. E. Nigussie, T. Xu,M. Potkonjak, "Securing wireless body sensor networks using bijective function-based hardware primitive", IEEE International Conference on Intelligent Sensors, Sensor Networks and Information Processing (ISSNIP), pp. 1-6, April, 2015. [PDF]

  322. J. B. Wendt, N. A. Conos, M. Potkonjak, "Multiple constant multiplication implementations in near-threshold computing systems", IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), pp. 1071-1075, May, 2015. [PDF]

  323. T. Xu, M. Potkonjak, "Stable and secure delay-based physical unclonable functions using device aging", IEEE International Symposium on Circuits and Systems (ISCAS), pp. 33-36, May, 2015. [PDF]

  324. T. Xu, D. Li, M. Potkonjak, "Adaptive characterization and emulation of delay-based physical unclonable functions using statistical models", ACM/IEEE Design Automation Conference (DAC), pp. 1-6, June, 2015. [PDF]

  325. T. Xu, J. B. Wendt, Potkonjak, "The Digital Bidirectional Function as a Hardware Security Primitive: Architecture and Applications", IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 1-6, July 2015. [PDF]

  326. T. Xu, H. Gu, M. Potkonjak, "Data Protection Using Recursive Inverse Function", International Conference on Field Programmable Logic and Applications (FPL), pp. 1-4, September, 2015. [PDF]

  327. J. Guo, J. B. Wendt, Miodrag Potkonjak, "Learning-Based Localized Offloading with Resource-Constrained Data Centers", IEEE International Conference on Cloud and Autonomic Computing (ICCAC), pp. 1-4, September, 2015. [PDF]

  328. T. Xu, Miodrag Potkonjak, "Energy Saving using Scenario based Sensor Selection on Medical Shoes", IEEE International Conference on Healthcare Informatics (ICHI), pp. 1-4, October, 2015. [PDF]

  329. M. Potkonjak, D. Chen, P. Kalla, S. P. Levitan, "DA Vision 2015: From Here to Eternity"(Invited paper), IEEE/ACM International Conference On Computer Aided Design (ICCAD), pp. 1-7, November, 2015. [PDF]

  330. R. Yan, T. Xu, Miodrag Potkonjak, "Data Integrity Attacks and Defenses for Intel Lab Sensor Network", IEEE World Forum on Internet of Things (WF-IoT), pp. 1-6, December, 2015. [PDF]

  331. T. Xu, M. Potkonjak, "Retiming and dual-supply voltage based energy optimization for DSP applications", International Conference on Acoustics, Speech and Signal Processing (ICASSP), pp. 1055-1059, March, 2016. [PDF]

  332. T. Xu, H. Gu, M. Potkonjak, "An ultra-low energy PUF matching security platform using programmable delay lines", International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), pp. 1-8, June, 2016. [PDF]

  333. H. Gu, T. Xu, M. Potkonjak, "An Energy-Efficient PUF Design: Computing While Racing", IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 142-147, August, 2016. [PDF]

  334. T. Xu, M. Potkonjak, "Pipelining for dual supply voltages", International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 9-16, September, 2016. [PDF]

  335. J. Guo, M. Potkonjak, "Coarse-grained learning-based dynamic voltage frequency scaling for video decoding", International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 84-91, September, 2016. [PDF]

  336. J. X. Zheng, T. Xu, M. Potkonjak, "Securing embedded systems and their IPs with digital reconfigurable PUFs", International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 169-176, September, 2016. [PDF]

  337. J. Guo, T. Xu, T. Stavrinos, M. Potkonjak, "Enabling environmentally-powered indoor sensor networks with dynamic routing and operation", International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 213-220, September, 2016. [PDF]

  338. T. Xu, M. Potkonjak, "Energy-efficient fault tolerance approach for internet of things applications", IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 1-8, November, 2016. [PDF]

  339. M. Potkonjak, G. Qu, F. Koushanfar, C-H. Chang, "20 Years of research on intellectual property protection", IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1-4, May, 2017. [PDF]

  340. J. Guo, M. Potkonjak, "Pruning Filters and Classes: Towards On-Device Customization of Convolutional Neural Networks", International Workshop on Embedded and Mobile Deep Learning (Deep Learning for Mobile Systems and Applications) (EMDL@MobiSys), pp. 13-17, June, 2017. [PDF]

  341. J. Guo, M. Potkonjak, "Pruning ConvNets Online for Efficient Specialist Models", IEEE Conference on Computer Vision and Pattern Recognition Workshops (CVPR Workshops), pp. 430-437, July, 2017. [PDF]

  342. H. Gu, T. Xu, M. Potkonjak, "A low-power APUF-based environmental abnormality detection framework", IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 1-6, July, 2017. [PDF]

  343. H. Gu, M. Potkonjak, "Securing Interconnected PUF Network with Reconfigurability", IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp. 1-4, May, 2018. [PDF]

  344. J. Guo, H. Gu, M. Potkonjak, "Efficient Image Sensor Subsampling for DNN-Based Image Classification", IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 1-6, July, 2018. [PDF]

  345. H. Gu, M. Potkonjak, "Efficient and Secure Group Key Management in IoT using Multistage Interconnected PUF", IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 1-6, July, 2018. [PDF]

  346. J. Guo, M. Potkonjak, "Watermarking Deep Neural Networks for Embedded Systems", IEEE International Conference on Computer-Aided Design (ICCAD), pp. 1-6, November, 2018. [PDF]

Patents

  1. L. Guerra, M. Potkonjak, J. Rabaey, "Behavioral Synthesis for Reconfigurable Datapath Structures", U.S. Patent 5,502,645, March 26, 1996.

  2. S. Dey, M. Potkonjak, R. Roy, "High Level Synthesis for Partial Scan Testing", U.S. Patent 5,513,118, April 30, 1996.

  3. S. Dey, M. Potkonjak, "Non-Scan Design-for-Testability of RT-Level Data Paths", U.S. Patent 5,513,123, April 30, 1996.

  4. S. Dey, M. Potkonjak, R. Roy, "High-Level Circuit Design Synthesis Using Transformations", U.S. Patent 5,550,749, August 27, 1996.

  5. S. Dey, M. Potkonjak, S. Rothweiler, "Eliminating Retiming Bottlenecks to Improve Performance of Synchronous Sequential VLSI Circuits", U.S. Patent 5,553,000, September 3, 1996.

  6. M. Potkonjak, S. Megerian, A. Mogre, D. Petranovic, "Design and optimization methods for integrated circuits", U.S. Patent 6,931,612, August 16, 2005.

  7. M. Potkonjak, S. Megerian, A. Mogre, D. Petranovic, "Multi-resolution Viterbi decoding technique", U.S. Patent 6,948,114, September 20, 2005.

  8. M. Potkonjak, "Methods and systems for the identification of circuits and circuit designs", U.S. Patent 7,017,043, March 21, 2006.

  9. M. Potkonjak, S. Megerian, A. Mogre, D. Petranovic, "Metacores: design and optimization techniques", U.S. Patent 7,017,126, March 21, 2006.

  10. M. Potkonjak, S. Megerian, A. Mogre, D. Petranovic, "Decoder using a memory for storing state metrics implementing a decoder trellis" U.S. Patent 7,467,359, December 16, 2008.

  11. F. Koushanfar, M. Potkonjak, "Lightweight secure physically unclonable functions" U.S. Patent 7,898,283, March 1, 2011.

  12. M. Potkonjak, S. Megerian, A. Mogre, D. Petranovic, "Decoder using a memory for storing state metrics implementing a decoder trellis", U.S. Patent 7,900,184, March 1, 2011.

  13. M. Potkonjak, "Input compensated and/or overcompensated computing", U.S. Patent 8,041,992, October 18, 2011.

  14. F. Koushanfar, M. Potkonjak, "Lightweight secure physically unclonable functions" U.S. Patent 8,054,098, November 8, 2011.

  15. M. Potkonjak, "Network node location discovery", U.S. Patent 8,054,762, November 8, 2011.

  16. M. Potkonjak, "Measurement-based wireless device system level management", U.S. Patent 8,111,149, February 7, 2012.

  17. M. Potkonjak, "Energy optimization through intentional errors", U.S. Patent 8,112,649, February 7, 2012.

  18. M. Potkonjak, "State variable-based detection and correction of errors", U.S. Patent 8,145,943, March 27, 2012.

  19. M. Potkonjak, "Non-invasive timing characterization of integrated circuits using sensitizable signal paths and sparse equations", U.S. Patent 8,176,454, May 8, 2012.

  20. M. Potkonjak, "Error detection and/or correction through coordinated computations", U.S. Patent 8,255,743, August 28, 2012.

  21. M. Potkonjak, "Usage metering based upon hardware aging", U.S. Patent 8,260,708, September 4, 2012.

  22. M. Potkonjak, "Non-invasive leakage power device characterization of integrated circuits using device grouping and compressive sensing", U.S. Patent 8,286,120, October 9, 2012.

  23. M. Potkonjak, "Wireless communication obstacles for improving wireless communications", U.S. Patent 8,346,245, January 1, 2013.

  24. F. Koushanfar, M. Potkonjak, "Hardware synthesis using thermally aware scheduling and binding", U.S. Patent 8,365,131, January 29, 2013.

  25. M. Potkonjak, "Efficient location discovery", U.S. Patent 8,369,242, February 5, 2013.

  26. F. Koushanfar, M. Potkonjak, "Testing Security of mapping functions" U.S. Patent 8,370,787, February 5, 2013.

  27. M. Potkonjak, "Hardware based cryptography", U.S. Patent 8,379,856, February 19, 2013.

  28. F. Koushanfar, M. Potkonjak, "Controlling integrated circuits including remote activation or deactivation" U.S. Patent 8,387,071, February 26, 2013.

  29. M. Potkonjak, "Infrastructure for location discovery" U.S. Patent 8,401,560, March 19, 2013.

  30. M. Potkonjak, F. Koushanfar, "Identification of integrated circuits" U.S. Patent 8,417,754, April 9, 2013.

  31. M. Potkonjak, "Adaptive compression" U.S. Patent 8,427,346, April 23, 2013.

  32. M. Potkonjak, "Distributed generation of mutual secrets" U.S. Patent 8,428,254, April 23, 2013.

  33. F. Koushanfar, M. Potkonjak, "Input vector selection for reducing current leakage in integrated circuits" U.S. Patent 8,443,034, May 14, 2013.

  34. N. Beckmann, M. Potkonjak, "Differential uncloneable variability-based cryptography" U.S. Patent 8,458,489, June 4, 2013.

  35. M. Potkonjak, "Combined-model data compression" U.S. Patent 8,473,438, June 25, 2013.

  36. M. Potkonjak, N. Beckmann, "Autonomous, non-interactive, context-based services for cellular phone" U.S. Patent 8,532,642, September 10, 2013.

  37. M. Potkonjak, "Coordination of packet and acknowledgment retransmissions" U.S. Patent 8,539,296, September 17, 2013.

  38. M. Potkonjak, "Non-invasive leakage power device characterization of integrated circuits using device grouping and compressive sensing" U.S. Patent 8,555,236, October 8, 2013.

  39. M. Potkonjak, "Error detection and/or correction through coordinated computations" U.S. Patent 8,566,638, October 22, 2013.

  40. M. Potkonjak, F. Koushanfar, "Identification of integrated circuits" U.S. Patent 8,620,982, December 31, 2013.

  41. F. Koushanfar, M. Potkonjak, "Hardware synthesis using thermally aware scheduling and binding" U.S. Patent 8,656,338, February 18, 2014.

  42. M. Potkonjak, "Scheduling and/or organizing task execution for a target computing platform" U.S. Patent 8,661,443, February 25, 2014.

  43. M. Potkonjak, "User profile-based wireless device system level management" U.S. Patent 8,667,109, March 4, 2014.

  44. M. Potkonjak, "Wireless one-to-one communication using multicast" U.S. Patent 8,675,538, March 18, 2014.

  45. M. Potkonjak, "Wireless communication system modeling" U.S. Patent 8,682,254, March 25, 2014.

  46. M. Potkonjak, "Efficient location discovery" U.S. Patent 8,712,421, April 29, 2014.

  47. M. Potkonjak, N. Beckmann, "Autonomous, non-interactive, context-based services for cellular phone" U.S. Patent 8,744,429, June 3, 2014.

  48. M. Potkonjak, "Efficient location discovery" U.S. Patent 8,744,485, June 3, 2014.

  49. M. Potkonjak, F. Koushanfar, "Identification of integrated circuits" U.S. Patent 8,788,559, July 22, 2014.

  50. M. Potkonjak, "Digital signatures" U.S. Patent 8,850,281, September 30, 2014.

  51. M. Potkonjak, "Combined-model data compression" U.S. Patent 8,868,476, October 21, 2014.

  52. M. Potkonjak, "Approach for optimizing energy consumption of multiple-input multiple-output system" U.S. Patent 8,902,797, December 2, 2014.

  53. F. Koushanfar, M. Potkonjak, "Methods and systems of digital rights management for integrated circuits" U.S. Patent 8,966,660, February 24, 2015.

  54. M. Potkonjak, "Forward-looking probabilistic statistical routing for wireless ad-hoc networks with lossy links" U.S. Patent 9,014,008, April 21, 2015.

  55. N. Beckmann, M. Potkonjak, "Differential uncloneable variability-based cryptography" U.S. Patent 9,020,150, April 28, 2015.

  56. M. Potkonjak, "Secure authentication" U.S. Patent 9,032,476, May 12, 2015.

  57. M. Potkonjak, "Program and data annotation for hardware customization and energy optimization" U.S. Patent 9,104,435, Augutst 11, 2015.

  58. M. Potkonjak, "Infrastructure for location discovery" U.S. Patent 9,125,066, September 1, 2015.

  59. M. Potkonjak, "Infrastructure for location discovery" U.S. Patent 9,154,964, October 6, 2015.

  60. M. Potkonjak, "Usage metering based upon hardware aging" U.S. Patent 9,177,119, November 3, 2015.

  61. M. Potkonjak, N. Beckmann, "Authentication of financial transactions via wireless communication link" U.S. Patent 9,177,311, November 3, 2015.

  62. M. Potkonjak, A. Nahapetian, "Semantic medical devices" U.S. Patent 9,262,589, February 16, 2016.

  63. M. Potkonjak, "Parking facility resource management" U.S. Patent 9,275,392, March 1, 2016.

  64. M. Potkonjak, N. Z. Beckmann, "Shared memories for energy efficient multi-core processors" U.S. Patent 9,367,462, June 14, 2016.

  65. M. Potkonjak, S. Meguerdichian, "Yield optimization of processor with graphene-based transistors" U.S. Patent 9,411,922, August 9, 2016.

  66. M. Potkonjak, "Scheduling and/or organizing task execution for a target computing platform" U.S. Patent 9,471,376, October 18, 2016.

  67. M. Potkonjak, "Aging-based usage metering of components" U.S. Patent 9,513,329, December 6, 2016.

  68. M. Potkonjak, "Aging-based leakage energy reduction method and system" U.S. Patent 9,520,292, December 13, 2016.

  69. M. Potkonjak, "User profile-based wireless device system level management" U.S. Patent 9,537,709, January 3, 2017.

  70. M. Potkonjak, "Voice to text to voice processing" U.S. Patent 9,547,642, January 17, 2017.

  71. M. Potkonjak, "Infrastructure for location discovery" U.S. Patent 9,759,800, September 12, 2017.

  72. M. Potkonjak, "Aging-based leakage energy reduction method and system" U.S. Patent 9,768,767, September 19, 2017.

  73. M. Potkonjak, "User profile-based wireless device system level management" U.S. Patent 9,825,803, November 21, 2017.

  74. N. Beckmann, M. Potkonjak, "Semantic compression" U.S. Patent 9,858,393, January 2, 2018.

  75. M. Sarrafzadeh, M. Potkonjak, F. Dabiri, H. Noshadi, S. Meguerdichian, "Energy aware sensor management for wearable medical systems optimization" U.S. Patent 9,888,868, February 13, 2018.

  76. M. Potkonjak, N. Beckmann, "Autonomous, non-interactive, context-based services for cellular phone" U.S. Patent 9,986,435, May 29, 2018.

  77. M. Potkonjak, "Heterogeneous multicore processor with graphene-based transistors" U.S. Patent 10,095,658, October 9, 2018.

  78. M. Potkonjak, "User profile-based wireless device system level management" U.S. Patent 10,122,570, November 6, 2018.

  79. M. Potkonjak, N. Beckmann, "Autonomous, non-interactive, context-based services for cellular phone" U.S. Patent 10,299,127, May 21, 2019.

  80. M. Potkonjak, "Program and data annotation for hardware customization and energy optimization" U.S. Patent 10,331,191, June 25, 2019.

  81. M. Potkonjak, "User profile-based wireless device system level management" U.S. Patent 10,476,734, November 12, 2019.