UCLA Computer Science Department
CS 259
Current Topics  in Computer Science: System Design/Architecture
Energy-Efficient Computer Systems
Spring 2011
Class: MW 10-12, 1003 Moore Hall

Prof. Milos D. Ercegovac
4731-H Boelter Hall
825-5414
e-mail: milos@cs.ucla.edu
web page:
http://www.cs.ucla.edu/~milos
Office hours: MW2-3pm, or by appointment



We discuss power/energy problems in computer systems and hardware, algorithm, and software approaches to deal with these problems  in the design of processors, arithmetic units, memories, and caches. We also study roles of OS, compiler optimizations and application-software in power management.  Examples of systems  discussed include power-efficient multiprocessors, reconfigurable systems, servers, embedded systems, mobile devices, and graphics processors.

Course material: several  books, listed below. These are available online via UCLA EMS Library. Selected papers will be provided on the class CourseWeb site.

Class Lecture/Presentation Viewgraphs:posted on the class CourseWeb site.

Grading:
The grading is based on class presentations (30%), discussions and participation (10%), and a project (60%). Presentations and projects will be peer-reviewed.

Prerequisites: A familiarity with digital design, computer architecture, and system software utilities such as compilers and operating systems, is desirable.

General Lectures

1. Introduction

Power/energy problems: sources. Basic concepts:power, energy, power dissipation, power density, power efficiency, energy efficiency. Energy-delay tradeoff. Power management. Overview  of optimization approaches: digital circuit level, processor architecture, primary memory and caches. Algorithms, compilers and operating systems.
[Readings: Rabaey Ch. 3, Panda Ch. 2]

2. Circuits and logic design

Power consumption in CMOS circuits. Dynamic  power: switching and short circuit power. Static power: leakage power. Techniques for reducing dynamic power:  gate sizing,  signal transitions,  FSM state encoding , clock gating, voltage and frequency scaling. Techniques for reducing static power.  Techniques for reducing leakage power: multiple supply voltage, multiple threshold voltage, adaptive body biasing, transistor stacking, power gating.

[Readings: Rabaey Ch. 4]

3.  Architecture, algorithms and systems

Architecture/system tradeoff space. Use of concurrency to improve energy efficiency. Energy-delay space. Matching computations and architecture: Application-specific processors. Arithmetic: Reducing signal transition frequency. Signal gating. Adders, accumulators, multipliers, dividers. Better-than-worst-case design. Approximate arithmetic.

[Readings: Rabaey Ch. 5]

4. Memories and caches

Embedded static random access memories (SRAM). Memory organization. Power in cell array, for read access,  and for write access. Power-efficient SRAM and cache architectures. Scratch pad memory (SPM). Data placement in SPM. Optimizing power in standby.
[Readings: Rabaey Ch. 7 and Ch. 9, Panda Ch. 4]

5. OS and compilers

OS optimizations: Power management policies. Advanced configurations and power interface (ACPI). Dynamic voltage and frequency scaling (DVFS). Compiler optimizations: loop transformations, instruction encoding, instruction scheduling, power gating. Dynamic translation and recompilation.
[Readings:
Rabaey Ch. 5, Panda Ch. 5]

Student Lectures:
After  two weeks of  the instructor's lectures on general topics,  the  classes will have the following format:  (i) an introduction by instructor, (ii) students' short lectures and  discussions by assigned students. For a class lecture, you will  select a topic, consult with instructor, and prepare a 25-minute presentation and a handout. The topic can be from the recommended books, selected papers.


Projects:
Individual or team (2-3 students).  Choice of projects are open as long as they address the course subject in a non-trivial manner. Suggestions for projects will be discussed in class.

Project proposals - draft for class review Wednesday, Week 3: everyone reviews each proposal

Preliminary reviews: due Monday, Week 4; feedback to projects by end of Week 4

Project presentations: Weeks 9 and 10. Slides and final report draft due at the presentation.

Final  reviews: each of you will be assigned 2 projects to review; return your reviews to me by Friday, Week 10. 

Final reports due Friday June 10, 5pm.


Books


Low Power Design Essentials by Jan Rabaey, Springer 2009.

Power-efficient System Design  by Preeti R. Panda, Aviral Shrivastava,
B.V.N. Silpa, and Krishnaiah Gummidipudi, Springer 2010.

Designing Embedded Processors: A Low Power Perspective Edited by J. Henkel and S. Parameswaran, Springer 2007.

Ultra-Low Energy Domain-Specific Instruction-Set Processors by Francky Catthoor et al., Springer  2010.

Low Power Methodology Manual For System-on-Chip Design by Michael Keating, David Flynn, Robert Aitken, Alan Gibbons, and Kaijian Shi, Springer 2007.

Closing the Power Gap Between ASIC & Custom: Tools and Techniques for Low
Power Design
 by
David Chinnery and Kurt Keutzer, Springer 2007.

CAD Algorithms, Methods and Tools for Low-Power Circuits and Systems,  Edited by E. Macii IEEE Technological Survey, 2006.

Conference proceedings








Journals and magazines

  • IEEE Transactions on Computers
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • IEEE Journal on Solid State Circuits
  • ACM Transactions on Design Automation of Electronic Systems (TODAES)
  • Journal of VLSI Signal Processing
  • IEEE Micro

Other resources

Penn State SimplePower cycle-accurate RT level energy estimation tool
SimPower

Green Computing  http://en.wikipedia.org/wiki/Green_computing

ARM Processor Architecture http://en.wikipedia.org/wiki/ARM_architecture

CPU power dissipation http://en.wikipedia.org/wiki/CPU_power_dissipation

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