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Speaker: David Patterson
Affiliation: UC Berkeley

patterson

ABSTRACT: Our bottom line is that collaboration on open-source software and hardware designs plus better tools to build prototypes via ever-more-powerful FPGAs and astonishingly inexpensive custom chips promise a new golden era for hardware/software systems. We start the talk by looking back at 50 years of computer architecture, where philosophical debates on instruction sets (RISC vs. CISC, VLIW vs. RISC) and parallel architectures (NUMA vs. clusters) were settled with billion dollar investments in the opposing views. We then look forward. First, Moore’s Law is ending, so the free ride of continuously increasing performance is over. Since we’ve already played the multicore card, the remaining path is domain-specific processors. Second, surprisingly there is now widespread agreement on instruction set architecture, namely RISC. However, unlike most other fields, despite this harmony has been no free and open alternative to proprietary offerings from ARM and Intel. Thus, we propose RISC-V (“RISC Five”), which targets Systems on a Chip (SoC). It has: • A small base of  50 classic RISC instructions that run a full open-source software stack. • Opcodes reserved for tailoring an SoC to applications. • Standard instruction extensions optionally included in an SoC. • A foundation to evolve RISC-V slowly via new optional extensions. • No restrictions: there is no cost, no paperwork, and anyone can use it. We conclude by recapping 10 RISC-V chips built using Agile methods in just 4 years, including the low price to make 100 28-nm chips. We used Chisel, a new hardware design language that reduces design effort by greatly increasing reuse.  Attendees will get a 2-page reference card (“green card”), which lists all RISC-V extensions, to contrast this minimal ISA with the 3,600-page x86 manual and the 5,400-page ARMv8 manual. Joint work with Krste Asanović, UC Berkeley. BIO: David Patterson joined UC Berkeley nearly 40 years ago. He has been the director of several research labs, Chair of Berkeley’s CS Division, Chair of the Computing Research Association, and President of ACM. His most successful projects are likely Reduced Instruction Set Computers (RISC), Redundant Arrays of Inexpensive Disks (RAID), and Network of Workstations (NOW), all of which helped lead to multi-billion-dollar industries. This research led to many papers, 6 books, and about 35 honors for him and his friends, including election to the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He shared the IEEE von Neumann Medal and the NEC C&C Prize with John Hennessy, co-author of two of his books and President of Stanford University.

Hosted by Professor Jason Cong

REFRESHMENTS at 3:45 pm, SPEAKER at 4:15 pm

Date/Time:
Date(s) - Mar 03, 2016
4:15 pm - 5:45 pm

Location:

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